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Published in IET Power Electronics Received on 1st March 2010 Revised on 9th September 2010 doi: 10.1049/iet-pel.2010.0092

ISSN 1755-4535

Voltage allocation control for multi-module power conversion system with parallel-input and series-output connection
R.-L. Lin1 W.-S. Liu1 J.-F. Chen1 M.-H. Chen1 C.-H. Liu2
1 2

Department of Electrical Engineering, National Cheng Kung University, Tainan, Taiwan Boyam Power System Co. Ltd., Tainan, Taiwan E-mail: papadog5555@gmail.com; papadog5555@yahoo.com.tw

Abstract: Voltage allocation (VA) is analysed for a multi-module power conversion system using a parallel-input and seriesoutput (PISO) connection with different power ratings. In PISO system, the multi-module converters with different power ratings cannot regulate total output voltage when one of the series module is operated in its voltage limited mode. Therefore an automatic master loop regulation (AMLR) control scheme is proposed to allocate output voltage of individual modules, as well as to regulate total output voltage and achieve power management. Presented also is a green-mode control (AMLR + backup module) that could shield backup module in light-load to improve light-load efciency. Finally, by using green-mode control, the experimental prototypes of three PISO forward modules with different power ratings are implemented in order to achieve VA mechanism. The efciency of the multi-module PISO system with the proposed control scheme in the light-load is improved by over 12%, as compared to the conventional control scheme.

Introduction

Wide studies have been made on extending the applications of DC converter, including its paralleled or series connections. To increase system output current, multi-module converter with paralleled-input paralleled-output (PIPO) are used, such as on distributed power systems (DPS) for telecommunications or DC power grids [1, 2]. In order to exibly increase output voltage and power, the multimodule power conversion system with paralleled-input and series-output (PISO) is employed. Many control methods have been presented for the application of expandable series load, such as series module in DPS for high-voltage applications, battery charger module for uninterruptible power supply systems, array light-emitting diodes lighting, modular charger converter of electrical machines and some household appliances with series expanded function [3 5]. In PISO system, there are many control schemes [6 11] that present voltage equalisation (VE) techniques, wherein the output voltage of individual modules is regulated at an equal value with same output capability. In VE techniques, Chen et al. [6] investigated DC DC conversion systems constructed from connecting the multi-modules in series and/or parallel at both the input and output sides. Moreover, Manias and Kostakis [7] and Garcera et al. [8] introduced multi-module PISO and PIPO power conversion system with master synchronisation regulation (MSR) control which synchronises all current mode modulators. The MSR has been investigated, and from it the small-signal model in series was derived. In addition, Al-Mothafar [9] compared the directed voltage regulation and MSR control schemes
86

[7] in multi-module PISO systems, and introduced the effect which varied the number of series modules by using the behaviour of large-signal analysis. Besides, Siri et al. [10] and Mazumder et al. [11] presented an automatic master slave sharing voltage (AMSV) control scheme with sharing bus for equalising the input/output voltage of individual modules, which have many advantages such as accuracy VE, k + 1 redundancy for high reliability, good fault tolerance and easy modular design. However, in these papers, there was no attempt to study the voltage allocation (VA) technique when the power ratings of the individual series modules differ. Specically, the input current of individual series module systems becomes affected or limited by the non-efcient or non-working series, thus leading to an unregulated total output voltage or cannot supply optimum output capability. Apart from this, in k + 1 redundant mechanism, when a new module is plugged in, the series multimodule averages the total output voltage with AMSV control in light-load, but this averaged voltage in output of individual modules could not operate at their optimum efciency point, therefore, resulting to limited overall efciency [12, 13]. To solve these problems, and to address exible connections in PISO system, a green-mode control composed of automatic master loop regulation (AMLR) control and backup module is proposed in this paper. Three power modules in series having different power ratings are presented herein to analyse VA, energy management and efciency estimation for the individual series module. The block diagram of the PISO system is shown in Fig. 1. The PISO system with green-mode control scheme (AMLR + backup module) offers many features, such as
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Referring to Fig. 2b, from (1) and (2), the individual output voltages, Vo_1 and Vo_2 , can be obtained as shown in (3) Vo
k

Vs Dk I o rL n

k k=1,2

(3)

Fig. 1 Block diagram of multi-module PISO power system

(i) VA ability under different output capabilities, (ii) higher efciency in light-load operation, (iii) exible connection for different voltage applications, (iv) high reliability and availability, (v) low voltage and current stresses on power devices and (vi) easy modular design.

In order to characterise VA among the individual modules in series, parameters rL_k and Dk , in (3), are assumed such that rL_2 . rL_1 , and Dk is xed (Vc constant). According to (3), the VI curves of Modules #1 and #2 are plotted, as shown in Fig. 2c. With different slopes in terms of rL_1 and rL_2 , the corresponding allocated voltages Vo_1 and Vo_2 are determined at the output critical current Io_cri . The lower the ESR of the output inductor is, the larger the output voltage of the individual module allocated. Therefore the VA can be achieved by adjusting the duty cycle or the inductor ESR of the individual module, which is utilised for the power management of PISO power system with different power ratings modules. 2.2 Characterisation of closed-loop PCM forward converter To further analyse VA, an example of a closed-loop PCM forward converter, shown in Fig. 3a, will be characterised to derive the parameters of the Norton equivalent circuit. In the example circuit, the current signal Riisw is compared with the control signal, Vc , at the input terminals of the pulse-width modulator (PWM MOD) to modulate the duty cycle. Fig. 3b shows the DC equivalent circuit in closedloop PCM control, where the characteristics of output voltage can be separated two modes, that are (i) voltage regulated mode (Io , Io_cri) and (ii) voltage limited mode (Io ^ Io_cri), which will introduce in detail as follows. 2.2.1 Voltage regulated mode (Io , Io_cri): In this mode, the output voltage is regulated at Vo_rated due to closed-loop feedback voltage control in Fig. 3c. According to (3) in this mode, the duty cycle Dreg is obtained as follows Dreg = nVo
rated

Principle of VA

The principle of VA among the individual modules in series power converters is presented in this section. Based on the example of a PISO forward converter system with two individual modules, the principle of the current-droop is employed to achieve the VA performance among the two individual modules. Besides, the characteristic of closedloop pulse-code modulation (PCM) forward converter is discussed at different output capabilities. 2.1 Current-droop analysis for VA

The Thevenin equivalent circuit has been widely used to describe the mechanism of current-sharing in parallel converters with various voltage-droop control schemes in [14]. Based on the reciprocal concept, the parallel converters can be converted to series ones, which can be modelled with the Norton equivalent circuit to analyse the mechanism of the proposed current-droop control scheme and achieve the VA condition [15]. Fig. 2a shows the example circuit with two series individual continuous conduction mode (CCM) forward converters, where the output inductors L1 and L2 contain the equivalent series resistors (ESRs) rL1 and rL2 , respectively. Furthermore, the output parallel diode, Dok , is used to bypass the output current when the fault of Module #k occurs, or when the load current is greater than the set-pointcurrent of Module #k (k 1 or 2). Considering the DC analysis, the PISO power conversion system in Fig. 2a can be modelled with two DC equivalent circuits in output-series, as shown in Fig. 2b. This PISO DC equivalent model can be further derived in terms of the Norton equivalent circuit, where the parameters of Ie_k and Re_k can be obtained as follows Ie = V s Dk rL k n (1)
k=1,2

+ nIo rL Vs

(4)

Based on (4), with the given values of Vo_rated , rL and Vin , the D I curve of the example module is plotted as shown in Fig. 3c, where DB = nVo
rated

+ nICCM, min rL Vs

The output voltage is regulated at Vo_rated by modulating the duty cycle when the output current is increased from ICCM,min to Io_cri . 2.2.2 Voltage limited mode (Io ^ Io_cri): In Fig. 3c, when Io reaches output critical current Io_cri , the duty cycle D is equal to Dmax . Referring to function of PWM MOD in Fig. 3a, the duty cycle is modulated at Dmax , because the control signal Vc is limited at Vc_max . The duty cycle operates in voltage limited mode when Io Io_cri . Fig. 4 shows the key waveforms of the PCM control in the voltage limiting, where Vc Vc_max and I o . Io_cri . When the load current Io increases to I o and exceeds the output critical current Io_cri , the turn-on period decreases from Ton_cri to T on . Therefore the limited duty cycle Dlim is regulated by the PCM
87

where Vs is the input sources, Dk is the duty cycle of Module #k and n is the power transformer turns ratio (N1/N2). Re
k

= rL k |k=1,2

(2)

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Fig. 2 Circuit model and V I curves

a Distributed power conversion system with two forward converters in output-series with a constant control voltage Vc b DC and Norton equivalent circuit model c V I curves of two circuit in series (Dk1 Dk2 , Ie1 . Ie2 , rL_1 , rL_2) with a constant control voltage Vc

control scheme in the voltage limited mode, which is obtained as shown in the following (5). Dlim T = on Ts (5)

expressed as Sn = VL (Vs /n) Vo, lim = L L (8)

According to (3) and (5), the limited output voltage Vo,lim can be obtained as follows Vo, lim
Io

Referring to Fig. 3c, the output current I o in the ranges of voltage limited mode can be derived as follows

VD = s lim Io rL n

Io = Io

max

(6)

Sn D T 2 lim s

(9)

where is the load current in the ranges of voltage limited mode. Referring to Figs. 3a and c, the corresponding output critical current Io_cri can be expressed as Io = Vc
max n

From (7), (8) and (9), the output current I o can be derived as below.

Io =

Vc

max n

Ri

(Vs /n) Vo, lim Dlim Ts 2L

(10)

cri

Ri

(7) Based on (10), the critical current Io_cri is obtained at Vo Vo_rated . In addition, the parameter design of the switch-current sensing resistance, Ri , for different power
IET Power Electron., 2012, Vol. 5, Iss. 1, pp. 86 94 doi: 10.1049/iet-pel.2010.0092

In addition, the slope Sn of the inductor current can be

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Fig. 3 Equivalent circuit model in closed-loop PCM control

a Block diagram b DC equivalent circuit model c D I curve of closed-loop PCM forward converter for regulating output voltage at Vo_rated

Fig. 5 Curves of D Io and Vo Io of the closed-loop PCM forward converter

a b c d Curves of D Io with different inductor values Curves of Vo Io with different inductor values Curves of DIo with different switch-current sensing gains (Ri) Curves of Vo Io with different switch-current sensing gains (Ri)

obtained as follows Dcl = Dreg , Io , Io cri Dlim , Io cri Io Io Vo rated , Io , Io cri Vo, lim , Io cri Io Io (14)
max

Vo,cl =

(15)
max

Fig. 4 Key waveforms of PCM control at Io . Io_cri , Vc Vc_max

ratings can also be derived as follows Ri = 2LVs Vc max n + (Vs Vo rated n)(Vo + Io cri (11)

2LVs Io

cri rL )Ts

By solving (6) and (10), the parameter Dlim of the DC equivalent circuit in Fig. 3c and that output voltage Vo,lim are derived as follows 1 r nI Dlim = L o 2 2Vs rL nIo 1 2Vs 2
2

nL Vc max n Io T s Vs Ri (12)

Based on (14) and (15), with the given parameters n 8, Vo_rated 12 V, fs 100 kHz, Vs 400 V, Vc_max 1, Ri 0.5 and rL 0.1 V, the curves D Io and Vo Io of the closed-loop PCM forward converter can be plotted, as shown in Figs. 5a and b, for different inductor values L 3, 5, 10 and 30 mH, respectively. In addition, with the given parameters Vs 400 V, n 8, Vo_rated 12 V, fs 100 kHz, Vc_max 1, L 10 uH and rL 0.1 V, the curves D Io and Vo Io of the closed-loop PCM forward converter can be plotted, as shown in Figs. 5c and d, for different switch-current sensing gains Ri 0.4, 0.5, 0.6 and 0.7. When the inductor values L are increased, as shown in Fig. 5b, the slopes of the Vo Io curves increase in the ranges of Io_rated Io Io_max . Furthermore, the critical current Io_cri and maximum output current Io_max are increased in Fig. 5d when the switch-current sensing gains Ri increase. Therefore by utilising the derived equations, the allocated voltage of the forward converter with PCM control scheme can be determined by adjusting the duty cycle, switch-current sensing gain or inductor value.

Vo, lim =

Vs 3rL Io 2n 2

rL Io Vs 2 2n

LVs Vc max n Io Ri Ts n (13)

3
3.1

VA control scheme
Voltage limitation of closed-loop PCM control

Combining with (4), (12) and (13), the closed-loop duty cycle Dcl and output voltage Vo,cl of the PCM control in the DC equivalent circuit model in Figs. 3b and c can be
IET Power Electron., 2012, Vol. 5, Iss. 1, pp. 86 94 doi: 10.1049/iet-pel.2010.0092

Directed series connection is a commonly used method providing exible connections to applications with different voltage requirements. Using previously derived equations,
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Fig. 6 Theoretical D Io and Vo Io curves

a Two DC equivalent circuits in series-output b Curves of D Io c Curves of Vo Io

the DC equivalent circuit with the closed-loop PCM control in Fig. 3b is utilised to characterise the individual voltages among the series-output of the power system. VA of individual voltages is analysed, as exemplied by the two series-output DC equivalent circuits (see Fig. 6a). Herein, the total output voltage Vout can be obtained as follows Vout = Vo1,cl + Vo2,cl (16)

Based on (18), (19) and (20), the theoretical D Io and Vo Io curves are plotted in Figs. 6b and c, respectively. In Fig. 6c, which assumes that Io_cri,#1 . Io_cri,#2 , and Vo_rated,#1 Vo_rated,#2 , the total output voltage can be regulated at 2Vo_rated as long as the critical current of Module #2 (Io_cri,#2) is greater than the load current Io . When Io . Io_cri,#2 , the total output voltage begins to decrease due to the effect of the PCM control mechanism, which makes the total output voltage unregulated at 2Vo_rated in Fig. 6c. 3.2 Proposed AMLR control scheme

power, the individual Vo_rated,#1 and Vo_rated,#2 are regulated at Vo_rated by the control loops through the EA1_1 and EA2_1 , respectively. Therefore the total output voltage Vout is regulated at 2Vo_rated in the ranges of Io , Io_cri,#2 . When the Io is greater than the Io_cri,#2 , which means that the Module #2 has been supplied it is critical current, the output voltage of Module #2 begins to decrease because of the effect of the PCM control mechanism. According to (13), the limitation voltage, Vo_lim,#2 , of Module #2 in the range of Io . Io_cri,#2 can be expressed as follows Vo
lim ,#2

Vs 3r I L2 o 2n2 2 rL2 Io V s 2 2n2

2

L2 Vs Vc max n2 Io Ts2 n2 Ri2 (17)

In order to regulate the total output voltage at 2Vo_rated , the AMLR control scheme is presented, as shown in Fig. 7a. In the AMLR control block, the output voltage signal of each module Vo_k and the total output voltage signal Vout are sensed into the corresponding error-ampliers (EAk_1,2). Through the diodes DAk_1 and DAk_2 at the output terminals of the EAk_1,2 in the #k module, the greater of the two error signals from the EAk_1,2 is determined to be Ve_k . By using the block of the limitation-function, the signal Vc_k is clamped within the limitation-range from the signal Ve_k . The signal Vc_k is compared with the signal Vsw_k (Riisw) at the input terminals of the PWM MOD to modulate the duty cycle Dk [16, 17]. In order to describe the characteristics of the AMLR control scheme, the critical current and voltage rating of the two modules series in Fig. 7a are assumed as Io_cri,#1 . Io_cri,#2 and Vo_rated,#1 Vo_rated,#2 . When Io_cri,#2 . Io , which means that the Module #2 is enough to supply the output
90

Since Io_cri,#1 . Io_cri,#2 , the AMLR control mechanism of Module #1 regulates the total output voltage at 2Vo_rated by the control loop through the EA1_2 . Therefore the new output voltage, Vo1_new , of Module #1, which increases to regulate the total output voltage at 2Vo_rated in Io . Io_cri,#2 , can be derived as shown below Vo
new,#1

= 2Vo

rated

Vo

lim ,#2

(18)

By applying (17) into (18), Vo_new,#1 can be obtained, as shown in (19). Vo = 2Vo + Vs 3r I + L2 o 2n2 2
2

new,#1

rated

rL2 Io V s 2 2n2

L2 Vs Vc max n2 Io Ts2 n2 Ri2 (19)

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Fig. 7 AMLR control scheme and theoretical D Io and Vo Io curves with AMLR control
a Proposed AMLR control scheme in system of two PISO power modules b Curves of D Io c Curves of Vo Io with AMLR control

Referring to (13), the limited output voltage Vo_lim for Module #1 can be expressed as Vo_lim,#1 in (20). = Vs 3r I L1 o 2n1 2 rL1 Io V s 2 2n1
2

shown in (21a) and (21b), respectively. Vo new,#1 = 1 + 0.0225Io + (0.0075Io 25)2 706 + 60Io

Vo

lim ,#1

(21a) L V Vc max n1 2 1 s Io Ts1 n1 Ri1 (20) Vo lim,#1 = 25 0.015Io (0.005Io 25)2 1067 + 60Io (21b) By solving (21a) and (21b) with Mathcadw mathematical software, the maximum output voltage value Vo_max,#1 and the new critical current value Io_cri,#1new can be obtained as 19 V and 8 A, respectively. Therefore the new equations D1_new,cl and Vo1_new,cl of Module #1 with AMLR control scheme can be obtained as follows Dreg1 , Io , Io cri#2 n V 1 o1 new D1 new,cl = , Io cri#2 Io , Io cri#1new Vin Dlim,#1 , Io . Io cri,#1new Vo rated , Io , Io cri,#2 Vo1 new,cl = Vo1 new , Io cri,#2 Io , Io cri,#1new V o lim ,#1 , Io . Io cri,#1new

By applying the experimental parameters of Module #1 and Module #2 in Table 1, (19) and (20) can be obtained, as
Table 1
Specications and parameters of forward converters Module #1 Vs Io_cri Vo_rated Ri Fs n (N1:N2) L rL Co Vc_max 400 V 10 A 12 V 0.45 V 100 kHz 8:1 6 mH 10 mV 1600 mF 1V Module #2 400 V 4A 12 V 0.68 V 100 kHz 8:1 6 mH 15 mV 1600 mF 1V Module #3 400 V 22 A 12 V 0.3 V 100 kHz 8:1 10 mH 5 mV 2200 mF 1V

(22)

(23)

Vc_max: maximum control signal voltage of UC3845 IET Power Electron., 2012, Vol. 5, Iss. 1, pp. 86 94 doi: 10.1049/iet-pel.2010.0092

Based on (14) (16), (22) and (23), the theoretical D Io and Vo Io curves with AMLR control can be plotted in Figs. 7b and c, respectively, where Io_cri,#1_new . Io_cri,#2 and Vo1(Io_cri,#1new) Vo1_max . Compared with the directed
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connection PISO system without AMLR control scheme in Fig. 6, Module #1 can regulate the total output voltage at 2Vo_rated by using AMLR control when Io_cri#2 , Io , Io_cri,#1new, which shows in Fig. 7c. Therefore the VA can be achieved for power management in the multi-module series-output power conversion system. Besides, by using those derived equations, the allocated output voltage can be accurately dened when multi-module is connected in series with different output capabilities. 3.3 Efciency improvement at green-mode each module is actually dramatically reduced. If all the modules are still averaging the total output load, switching loss, reverse-recovery loss, inductor core and wire loss will remain constant in all modules. This prevents the multimodule PISO system from operating in an optimum efciency point. In particular, the output voltage of each module decreases when a redundant-module is plugged into the series power system. The total efciency, htotal , in the multi-module seriesoutput power system can be derived as follows [18]

htotal =

In order to provide higher reliability in a multi-module PISO power conversion system, the AMSV control scheme is a popular control method to achieve k + 1 redundancy mechanism. In the k + 1 redundancy mechanism, the redundant module will share the total voltage (Vok Vout/k), and the total output voltage can be expressed as follows Vout = Vo1 + Vo2 + + Vok (24)

Vout (Vo1 /h1 ) + (Vo2 /h2 ) + + (Vok /hk )

(25)

When the output load becomes light, the power process by

where Vok are the individual voltages, Vout is the total output voltage and hk are the individual efciencies. In order to make the individual series modules operate at their optimum efciency, backup modules are designed to series on the original structure of AMLR control circuit (regular modules) for the green-mode control, as shown in Fig. 8a. The backup modules only sense the total output voltage signal into the error-amplier to compare with Vout_ref; therefore these modules can regulate the system

Fig. 8 Backup modules

a Proposed multi-modules PISO power conversion system with green-mode control (AMLR + backup module) b Measured VI curves in series-output only using AMLR control scheme (Modules #1 and #2) c Voltage waveforms of two modules (Modules #1 and #2) with step-up current from 3 to 7 A 92 IET Power Electron., 2012, Vol. 5, Iss. 1, pp. 86 94 doi: 10.1049/iet-pel.2010.0092

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output voltage at kVo_rated . When the output current Io exceeds the maximum rated current of the series regular modules, the backup modules will start to provide the power for regulating the total output voltage at kVo_rated , because the series regular modules are not able to provide an expected output voltage in voltage limited mode. In general, the optimum efciency points of the individual modules are designed in the rated output voltage Vo_rated . Therefore the backup module will be shielded at light-load, which makes the overall system operating at high efciency. According to the measured results, the greater the power rating is, the greater the output voltage of the individual module allocated. However, with the AMLR control scheme in Fig. 8b, the total output voltage can be regulated at 24 V when the output voltage of Module #2 decreases. Fig. 9a shows the measured V I curves of the conventional AMSV control scheme with 2 + 1 redundancy, which averages the total output voltage when the output voltage of any module is limited. The total output voltage in this system is always regulated at 24 V when Io , 16 A. Fig. 9b shows the measured V I curves of the AMLR scheme, and setting Module #2 as the backup module, where the Module #2 regulates the total output voltage at 24 V when the voltages of two regular modules (Modules #1 and #3) decrease. Fig. 10a shows the measured efciency of individual modules at specied output voltages in full-load current. According to the measured results, the efciency of each module is reduced when the output voltage of each module decreases. Based on the measured results of Figs. 10a and b shows the comparison of measured efciency curves of proposed PISO system with the conventional AMSV control scheme with 2 + 1 redundancy and the proposed AMLR control scheme (Module #2 backup). In light-load, with the AMSV control scheme for the three series power system, each module averages the total output voltage at 8 V. However, the three series power systems with AMSV control scheme are not able to operate at their optimum efciency.

Implementation and experimental results

In order to verify the VA for the multi-module PISO power conversion system in practice as shown in Fig. 8a, the prototype topologies of three forward converters with different power ratings in series are implemented. The PCM control mechanism is designed based on the current mode control IC UC3845. There are three power converters used as examples, each with a different output power rating of 120, 50 and 260 W, respectively, and each having an output voltage of 12 V. According to (11), the parameters of switch-current sensing resistance Ri can be designed. The specications and parameters of the three modules are listed in Table 1. Fig. 8b shows the measured VI curves of two series modules with AMLR control. In addition, Fig. 8c shows the output voltage waveforms in two PISO modules by using the AMLR control scheme when a step output current Io from 3 to 7 A.

Fig. 9 Measured VI curves of three forward modules in seriesoutput

a By using AMSV control scheme with 2 + 1 redundancy b Proposed green-mode control scheme with Module #2 as backup module IET Power Electron., 2012, Vol. 5, Iss. 1, pp. 86 94 doi: 10.1049/iet-pel.2010.0092

Fig. 10 Measured efciencies

a Three individual modules with specied output voltages at full load b Comparison of three PISO modules with conventional AMSV control and proposed green-mode control (Module #2 backup) 93

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Therefore by using the green-mode control scheme (AMLR + backup module) in light-load, the backup module is shredded, and the voltage of two regular modules is regulated at 12 V, which makes each power module operate at optimum efciency. However, the efciency of three series power modules with the proposed green-mode control in light-load is improved by more than 12%.
2 Luo, S., Ye, Z., Lin, R.L., Lee, F.C.: A classication and evaluation of paralleling methods for power supply modules. IEEE Power Electron. Specialists Conf. (PESC), June 1999, pp. 901 908 3 Roman, E., Alonso, R., Ibanez, P., Elorduizapatarietxe, S., Goitia, D.: Intelligent PV module for grid-connected PV system, IEEE Trans. Ind. Electron., 2005, 53, (4), pp. 10661073 4 Moo, C.S., Ng, K.S., Hu, J.S.: Operation of battery power modules with series output. IEEE ICIT Conf., February 2009, pp. 1 6 5 Patterson, J., Zane, R.: Series input modular architecture for driving multiple LEDs. IEEE PESC Conf., June 2008, pp. 26502656 6 Chen, W., Ruan, X., Yan, H., Tse, C.K.: DC/DC conversion systems consisting of multiple converter modules: stability, control, and experimental verications, IEEE Trans. Power Electron., 2009, 24, (6), pp. 1463 1474 7 Manias, S.N., Kostakis, G.: Modular DC DC converter for high-output voltage applications, IEE Proc. B, 1993, 140, (2), pp. 97 102 8 Garcera, G., Pascual, M., Figueres, E.: Robust average current-mode control of multimodule parallel dcdc PWM converter systems with improved dynamic response, IEEE Trans. Ind. Electron., 2001, 48, (5), pp. 995 1005 9 Al-Mothafar, M.R.D.: Comparison of large-signal behavior of control schemes for high-output voltage modular DCDC converters. IEEE ICECS99, 6 September 1999, vol. 3, pp. 1427 1431 10 Siri, K., Willhoff, M., Conner, K.: Uniform voltage distribution control for series connected DCDC converters, IEEE Trans. Power Electron., 2007, 22, (4), pp. 1269 1279 11 Mazumder, S.K., Tahir, M., Acharya, K.: Master slave currentsharing control of a parallel dc dc converter system over an RF communication interface, IEEE Trans. Ind. Electron., 2008, 55, (1), pp. 5966 12 Sun, J., Xu, M., Ren, Y., Lee, F.C.: Light-load efciency improvement for buck voltage regulators, IEEE Trans. Power Electron., 2009, 24, (3), pp. 742 751 13 Li, H., Gan, H., Ying, J.: High active mode efciency switching mode power supply. IEEE APEC08, February 2008, pp. 715 721 14 Batarseh, I., Siri, K., Lee, H.: Investigation of the output droop characteristics of parallel-connected DCDC converter. PESC94, pp. 1342 1351 15 Glaser, J.S., Witulski, A.F.: Output plane analysis of load-sharing in multiple-module converter systems, IEEE Trans. Power Electron., 1994, 9, (1), pp. 43 50 16 Lin, R.L., Lin, H.D.: Current-equalization techniques for electronic ballasts, IEEE Trans. Power Electron. (Special Section on Lighting Applications), 2007, 22, (3), pp. 824 830 17 Cid-Pastor, A., Martinez-Salamero, L., Alonso, C., Aroudi, A.E., Valderrama-Blavi, H.: Power distribution based on gyrators, IEEE Trans. Power Electron., 2009, 24, (12), pp. 2907 2909 18 Chen, J.F., Liu, W.S., Lin, R.L., Liang, T.J., Liu, C.H.: High-efciency cascode forward converter of low power PEMFC system, IEEE IPEMC, 2006, 1, pp. 361 367

Conclusions

This paper has presented a multi-module PISO power conversion system placed under different power ratings. The AMLR control scheme is used to allocate individual output voltages for power management. In order to analyse and design VA, the closed-loop PCM forward converter is characterised to derive the parameters of the DC equivalent circuit. Using the AMLR control scheme and modular design, each converter could regulate the system output voltage when one of the series converters is operated under a voltage limited mode. Experimental results of the three PISO power conversion systems with the green-mode control (AMLR + backup module) are presented to show VA ability, high reliability and availability, and improved efciency under different output capabilities. A comparison of the green-mode and AMSV control scheme shows that the efciency of the proposed control scheme was improved by more than 12% in light-load.

Acknowledgments

The authors gratefully acknowledge nancial support from the National Science Council, Taiwan, under Award Numbers NSC 98-3114-E-006-001-CC2 and Bureau of Energy, Ministry of Economic Affairs, Taiwan, under Award Numbers 99-D0204-2.

References

1 Lee, F.C., Barbosa, P., Xu, P., Zhang, J., Yang, B., Canales, F.: Topologies and design considerations for distributed power system applications, Proc. IEEE, 2001, 89, (6), pp. 939 950

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