A Presentation On

OVANIC UNIFIED MEMORY

[2012-2013] Submitted In Partial Fulfillment of Bachelor Degree in Technology Rajasthan Technical University, Kota

Submitted To: Ms. Garima Mathur (HOD,ECE)

Submitted By: Rajiv Kumar (ECO9092) Department of Electronics & Communication Engineering Jaipur Engineering College Kukas, Jaipur-303101

CONTENTS
Introduction

Emerging Memory Technologies

Ovonic Unified Memory OUM Architecture Advantages Conclusion Reference

INTRODUCTION:
Semiconductor memory is an electronic data storage device.

Implemented on a semiconductor-based integrated circuit.

Semiconductor memory has the property of random access, which means that it takes the same amount of time to access

any memory location.

In a semiconductor memory chip, each bit of binary data is stored in a tiny circuit called a memory cell consisting of one to several transistors.

FEATURES OF GOOD MEMORY

Ability to retain stored charge for long periods with zero applied or refreshed power. High speed of data writes.

Low power consumption.

Large no: of write cycles. Actually none of the present memory technologies combine these features.

RECENT ADVANCED MEMORY TECHNOLOGIES

Magneto resistive RAM(MRAM) Resistive RAM (RRAM) Phase- Change RAM(PCRAM)

Magneto resistive RAM(MRAM)

Magneto resistive random-access memory (MRAM) is a nonvolatile random-access memory technology that has been under development since the 1990s. Data in MRAM is not stored as electric charge or current flows, but by magnetic storage elements. The elements are formed from two ferromagnetic plates, each of which can hold a magnetic field, separated by a thin insulating layer. One of the two plates is a permanent magnet set to a particular polarity, the other's field can be changed to match that of an external field to store memory

Resistive RAM (RRAM)

Resistive random-access memory (RRAM or ReRAM) is a nonvolatile memory type under development by a number of different companies. The basic idea is that a dielectric, which is normally insulating, can be made to conduct through a filament or conduction path

formed after application of a sufficiently high voltage. The

conduction path formation can arise from different mechanisms, including defects, metal migration, etc. Once the filament is formed, it may be reset (broken, resulting in high resistance) or set (re-formed, resulting in lower resistance) by an appropriately applied voltage

Phase- Change RAM(PCRAM)

It Is also called Ovonic Unified Memory. It is a type of non-volatile random-access memory. Ovonic Unified Memory is the registered name for the non-volatile memory based on the material called chalcogenide. The term chalcogen refers to the Group VI elements of the periodic table. Chalcogenide refers to alloys containing at least one of these elements such as the alloy of germanium, antimony, and tellurium

ABOUT CHALCOGENIDE ALLOY

Its a ternary system It consists of gallium, antimony & tellurium chemically called ge2sb2te5

STRUCTURE & ELECTRIC PROPERTY OF PHASE CHANGE MATERIALS

OVONIC UNIFIED MEMORY

OUM IS A NON VOLATILE MEMORY TECHNOLOGY WITH:

High speed
Low power

Reduced cost
High endurance

Merged memory / simplified logic

OVONIC UNIFIED MEMORY(CONT.)

This phase change technology uses a thermally activated, rapid, reversible change in the structure of the alloy to store data. The binary information is represented by two different phases of the material it is inherently non-volatile, requiring no energy to keep the material in either of its two stable structural states. The two structural states of the chalcogenide alloy, as shown in Figure are an amorphous state and a polycrystalline state.

OUM Technology Concept

Amorphous Vs Crystalline

Short Range Atomic Order Low Free Electron Density High Activation Energy High Resistivity

Long Range Atomic Order High Free Electron Density Low Activation Energy Low Resistivity

OVONIC UNIFIED MEMORY(CONT.)

Relative to the amorphous state, the polycrystalline state shows a dramatic increase in free electron density, similar to a metal.

MEMORY STRUCTURE

READING & WRITING DATA

TO WRITE DATA Chalcogenide is heated above its melting point to reset state[high resistance] Heated below its melting point for 50ns to set state[low resistance]

TO READ DATA Reading is done by simply measuring the resistance change. High resistance = reset state Low resistance = set state

PROGRAMMING
The OUM cell is programmed by application of a current pulse at a voltage above the Switching threshold The programming pulse drives the memory cell into a high or low resistance state, depending on magnitude of the pulse voltage.

Information stored in the cell is read out by measurement of the cells resistance
OUM devices are programmed by electrically altering the structure(amorphous or crystalline) of the small volume of chalcogenide alloy.

BASIC DEVICE OPERATION

V-I CHARACTERISTICS

ADVANTAGES
Readwrite performance

High Speed
Endurance Low programming energy Process simplicity Cost CMOS embed ability Scalability

CONCLUSION
Non volatile OUM with fast read and write speeds, high endurance, low voltage/low energy operation, ease of integration and competitive cost structure is suitable for ultra high density ,stand alone and embedded memory applications. These attributes make OUM an attractive alternative to flash memory technology and potentially competitive with volatile memory technologies.

REFERENCES
OUM a 180 nm non volatile memory cell element technology for stand alone and embedded applications Stefan Lai and Tyler Lowery Current status of Phase change memory Stefan Lai
www.intel.com

www.ovonyx.com

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