Microcontrollers Week3: Instructions Sets

Dwight Sabio

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Byte Oriented Operations

Byte instructions work on all 8 bits in the file. So a byte instruction would be followed by the appropriate file number.

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NOP
Uses one instruction cycle. Used for short time delays.

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MOVWF f
Moves contents of W register to another file register location. Status affected: None Example MOVWF Temp

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MOVF f,d
f d Moves contents of one file register to another. Can be used to set the Zero Status bit. Status Affected: Z Example MOVF Temp, f

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CLRF f
The contents of register f are cleared and the Z bit is set. File (f) = 00000000 Status affected: Z

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CLRW
W register is cleared. Zero bit (Z) is set. W = 00000000 Status affected: Z

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INCF f,d
f + 1 d Status affected: Z

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DECF
f - 1 d Status affected: Z

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ADDWF f, d
W + f d Adds the contents of W to a File Register Status Affected: Z

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ANDWF f,d
W AND f d Status Affected: Z Performs Logical AND with W and f Can be used to mask out specific bits

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IORWF f, d
W OR f d Status Affected: Z Executes Inclusive-OR with W and a File Register

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XORWF f,d
W XOR f d Status Affected: Z Executes Exclusive-OR with W and a File Register

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COMF f,d
f d Executes a ones compliment on a file register.

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RRF f, d

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RLF f,d

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SUBWF f,d
f - W d Subtracts the contents of W from a File Register Twos compliment Status affected: C, DC, Z

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DECFSZ f,d & INCFSZ f,d

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SWAPF f,d

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Bit Oriented Operations

The bit instructions act on a particular bit in a file, so the instruction would be followed by the data which specifies the file register and bit number. 1. BCF 2. BSF 3. BTFSC 4. BTFSS

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BCF f,b
Clear the bit in a file F. Status Affected: None Operands: 0 f 127 0b7
BCF PORTB, 4; bit 4 is cleared in the PORTB

PORTB bit 4 is cleared; bit 4 = 0

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BSF f,b
Set bit in file F. Status Affected: None Operands: 0 f 127 0b7
BSF PORTB, 4; bit 4 is set in the PORTB

PORTB bit 4 is set; bit 4 = 1

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BTFSC f,b
Test bit in file skip if clear. Operation: skip if (f<b>) 0 Status Affected: None Operands: 0 f 127 0b7 BTFSC STATUS, 2 This test bit 2 in STATUS Register if it is clear then the next instruction is missed. Bit 2 is the zero bit so the program jumps if the result of an instruction was zero.

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BTFSS f,b
Test bit in file skip if set. Operation: skip if (f<b>) = 1 Status Affected: None Operands: 0 f 127 0b7 BTFSS STATUS, 2 This tests bit 2 in the STATUS Register is set then the next instruction is skipped.

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Literal and Control Operations

It modify files with variables or control the movement of data from one file to another.

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ADDLW k
Add a number(literal) to W. Operation: (W) + k (W) Operands: 0 k 255

ADDLW 7 Will add 7 to W, the result is placed in W.

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ANDLW k
The contents of W are ANDed with an 8 bit number(literal). The result is placed in W. ANDLW 12H ANDLW b00010010 ANDLW .18

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CALL k
Call Subroutine CALL WAIT1MIN- This will call a routine (you have written) to wait for 1 min.

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GOTO k
This is an unconditional jump to a specified location in the program.

GOTO SIREN

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IORLW k
The contents of the W register are Ored with the file F. The result is placed in the W register. Status Affected: Z IORLW 7

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MOVLW k
The 8 bit literal is moved directly into W.

MOVLW .127 MOVLW b11101100 MOVLW 15h

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RETFIE
Return from Interrupt This instruction is used to return from an interrupt.

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RETLW k
This instruction is used at the end of a subroutine to return to the program following a CALL instruction. The literal value is placed in the W register. This instruction can also be used with a look up table.

RETLW 0

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RETURN
This instruction is used to return from a subroutine.

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SUBLW k
The contents of the W register are subtracted from a number. Operation: k (W) (W)

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XORLW k
The contents of the W register are Exclusive Ored with the literal. If a number of the input port, indicating temperature, is the same as the literal then the result is zero and the zero bit is set. XORLW 67

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CLRWDT
The watchdog timer is cleared. The watchdog is a safety device in the microcontroller if the program crashes the watchdog timer times out then restarts the program. Status affected: TO, PD

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SLEEP
When executing this instruction the chip is put into sleep mode. The power-down status bit (PD) is cleared, the time-out status bit is set, the watchdog timer and its prescaler is cleared and the oscillator driver is turned off. The watchdog timer still keeps running form its own internal clock. Status affected TO, PD

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Assume: f. CLRW g. COMF ALPHA,d W = 53h h. DECF BETA k = 26h i. INCF TEMP TEMP = BAh j. IORLW k ALPHA = 3Eh BETA = b11111001 k. IORWF BETA, w Find the result & indicate the l. MOVF ALPHA, 0 value of the C, DC & Z bit a. ADDWF TEMP, 1 m. RLF BETA, 1 n. SUBLW k b. ADDLW k o. SUBWF BETA c. ANDLW k d. ANDWF ALPHA e. CLRF TEMP

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