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Agenda
1.Explanation of Layout and Function of Circuit Board 2.Operation Explanation per Board
2-1 2-2 2-3 2-4 Drive Description on SMPS Operation Explanation of Driving Circuit Logic-Main Board Scaler Board
SMPS
Y-MAIN X-MAIN
Logic-Main
Y buffer "Lower"
E-buffer
F-buffer
G-buffer
COF x 7
.X-MAIN BOARD : It makes the drive wave form by switching FETs to Timing Controlle coming from logic-board and supplies X electrode of panel with the drive wave form via connector.
.Y-MAIN BOARD : It makes the drive wave form by switching FETs to Timing Controller coming from the logic-board and provides Y electrode of panel with the drive wave form via Scan Driver IC on Y buffer board in order.
.LOGIC MAIN BOARD : It process image signal and performs buffering of the logic-main board (to create XY drive signal and output) and the address driver output signal. Then it supplies the output signal to the address driver IC(COF Module).
.Y-BUFFER (Upper,Lower) : It is the board to impress the scan waveform on the Y board and consist of 2 boards (upper board and lower board). 8 Y-buffers are fixed at the scan driver (STV7617 of STC corp. : 64 or 65 Output).
.AC Noise Filter : It has functions to remove noise(low frequency) coming from AC LINE and prevent surge. It gives serious effects on the safety regulations (EMC, EMI) according to AC filter.
.COF(Chip on Flexible) : It impress the Va pulse to the address electrode in the address section and forms the address discharge by electric potential difference with scanning pulse to be dismissed by the Y electrode. It is made in the form of COF and one COF consists of 4 Data Drive IC (STV7610A :96 Output), otherwise single scan is made of 7 COF.
Barrier
Address Electrode
Back panel
Y480 X
Reference
- A1,A2, , , : Address Electrode - Y1,Y2, , , : Scan & Sustain Electrode - X : Common & Sustain Electrode
ADDRESS OPERATION
SUSTAIN OPERATION
Reset
Address
Sustain
Function Sustain Erase Wall Charge Set Issue Operation margin Contrast Short Time
Function Select On Cell Issue High Speed Low Voltage Low Failure
Function Discharge On Cell Issue High Efficiency Low Voltage ERC Performance
SF2
SF3
SF4
SF5
SF6
SF7
1T 2T 4T 8T 16T
32T
64T
128T
sustain
D X Y1 Y2
Yn
SF2
SF3
SF4
SF5
SF6
SF7
1T 2T 4T 8T 16T
32T
64T
128T
sustain
Logic B'd
Display Data DRAM Driver Timing Row Driver 852 X 480 Pixels 853 X 3 X 480 Cells Y-Pulse Scan Timing Generator Column Driver Power B'd
X-Main B'd
PDP Panel
X-Pulse Generator
Data Controller
Clock : 27MHz
Clock : 60MHz
20MHz 40MHz
Power Supply
LVDS
Digital B'd Analog B'd Audio Processor Video S/W Comb Filter Tuner
CN805 (10P)
CN805 (10P)
Y-Main
CN804 (9P)
CN804 (9P)
CN801 (10P)
X-Main
CN803 (10P)
Logic
CN402
CN101 CN403
CN101
CN806)
EF1
GF1 AC Inlet
CN111 CN601
CN802
CN801
Digital
Analog
PIN CONFIGURATION
[ Scaler : Analog Dgital ]
CN101(Control) NO 1 2 3 4 5 6 7 8 9 10 11 12 PIN Name GND SCL1 SDA1 GND SAFT GND MUTE GND MAFT GND ANAL_CVBS GND CN102(Video/Sync) NO 1 2 3 4 5 6 7 8 9 10 11 12 PIN Name ANAL_YCOMB GND ANAL_CCOMB GND ANAL_Y2 GND ANAL_PB2 GND ANAL_PR2 GND ANAL_H ANAL_V CN103(Video/Sync) NO 1 2 3 4 5 6 7 8 9 10 11 12 PIN Name ANAL_YCOMB GND ANAL_CCOMB GND ANAL_Y2 GND ANAL_PB2 GND ANAL_PR2 GND ANAL_H ANAL_V NO 1 2 3 4 5 6 7 8 9 10 11 12 13 14
PIN CONFIGURATION
[ SMPS Analog / Digital / Logic ]
CN801(Analog Tu) NO 1 2 3 4 5 6 7 8 9 10 Power GND A33V GND GND AMP12V AMP12V GND D12V GND D6V CN802(Digital Tu) NO 1 2 3 4 5 6 7 8 9 10 11 Power THEM_D STD_5V GND PS_ON N.C. GND GND D3.3V D3.3V GND D6V 1 2 3 4 5 6 7 8 9 10 CN803(Logic) NO Power D3.3V D3.3V GND GND D5V GND IC2 IC2 PS_ON GND NO 1 2 3 4 5 6 7 8 9
2. Input controller SMPS works in whole section of AC 90~264V. It is possible to start in the AC 90 and can restart with new input voltage, even in interruption of electric power. STD_5V comes out when AC is impressed
3. Output Controller Given SMPS have 15 output voltages. The following shows the specification of output voltage and output current in case of their successive drive.
It has circuit to maintain normal voltage, additionally with circuit for sensing overvoltage, so it means any
overvoltage does not give impacts on other output controller. SMPS prevents overvoltage in the latch mode. VS(85V) works protection function more than 100V, over 94V for VA(75V), over 8.2V for D6V, over 4.7V for D3.3V
4. Detail Description AC-DC Converter It converts AC into DC by using the power factor improvementcircuit. This converter was designated to
control the high frequency noise, with the function to improve the power factor. This part becomes input
controller of another constant-voltage.
Configuration of VS output Major part of PDF SMPS outputs 85V 5A. It takes asymmetrical half bridge converter and connects 2 converters with 85V output in parallel, which increases efficiency than one 85V converter,
[ VSET Pulse ]
[ VE Pulse ]
[ Vscan Pulse ]
[ Va Main Pulse ]
OK
PFC
OK NG
OK
PFC
NG PFC
NG
VS
OK
Vscan VE,Vset OK
2) Working Principle of Driver Circuit To develop image on the PDP, the voltage should be impressed into the X, Y and ADDRESS electrodes (which are component of each pictorial element) under the proper conditions. The driver wave form which is currently applied to is ADS (Address & Display Separate: Driving method to work by dividing address and constant-current section ) Based on this method, the discharge to be done in the pictorial element of PDP can be divided into 3 types as follows.
Address Discharge: to form the wall voltage within pictorial element by providing lighting pictorial
If the wall voltage formerly exists in the pictorial element(i.e., the pictorial element is on), the discharge makes
forms again because the voltage higher than one of the discharging starting time is impressed by combination of the wall voltage and of the next impressed constant-current. While if the wall voltage does not exist in the pictorial element (i.e., the pictorial element is off), the discharge does not form because the voltage could not reach to the level of the discharging starting time, only with constant-current.
company, etc. Outside applied voltage is adjusted depending on difference of wall voltage within Pixel,
since discharge is formed when the sumof the existing wall voltage remained and the voltage on a rising waveform exceed the driving beginning voltage, by slowly applying the rising slope of the erased waveform for these two methods. In addition, weak discharge is formed since the strength of applied voltage is small.
Vs
: 85V
Address Pulse
A1,2..... X Y1,2....
Address(=Data) Electrode Common & Sustain Electrode Scan & Sustain Electrode
Vs Vset Vscan
Ve Va
110V 79V
discharge begins if respective gap voltage equals to the discharge beginning voltage.
Negative Wall charges accumulate on the Y electrode and the Positive Wall charges on the X electrode in the whole while weak discharge is maintained.
Y Falling Ramp Pulse Most of Negative Wall charges accumulated on the Y electrode by the X bias of about 200V are used to remove Positive Wall charges in the Y Falling Ramp zone, and most of Positive charges accumulated on the (0V) Rising Ramp zone toward the address electrode are maintained, having distribution of wall charges beneficial for the subsequent address discharge.
However, since Negative Wall charges accumulate on the Y electrode by the application of Ramp pulse
and Positive Wall charges accumulate on the address electrode, voltage of more than the discharge beginning voltage is applied to the cell where address pulse(70V~75V) is allotted and thus address discharge occurs. Address time of the PDP is very long since both scan pulse and data pulse must be applied in line at a time.
1st Sustain Pulse The Sustain Pulse always begins from the Y electrode, it is because Positive Wall charges are formed on the Y electrode if address discharge occurs. The wall charges formed by the address discharge are less than those for the sustain discharge, and thus the strength of the initial discharge is weak. Sustain discharge usually become stable after 5~6 times of discharge depending on structure of electrode and environment. Therefore, the initial long sustain pulse is intended to form the initial discharge stable and form the wall charges much as possible as.
OUTL
OUTH
OUTL OUTH
OUTL
OUTH
TPOUT
CN803 28.636MHz X2002 OSC CY2305 U2003 EPC2 U2011 EPC2 U2007 EPC2 U2006 64M SDRAM U2014
X2000 60MHz 64M CY2305 U2002 SDRAM U2013 RESET SPS10-MEM ASIC MEMORY CONTROLLER U2000 Circuit X CONTROL X CONTROL CN101
EP20K400EBC652-1 Y CONTROL Y CONTROL CN201 28BV256K U2001 IIC VCC(3.3V) GND IIC(SCL,SDA) CN2002 CN401
ADRV101~106 ADRV201~206 ADRV301~306 CLK,BLK,POL,STB
8 bit per DATA R.G.B 1 bit per H,V SYNC 1 bit per DATA_EN,TSC,POL,SEN,SDA,SCLK _nRESET
40MHz X2001
CLK_XY(20MHz),SV_SYNC nRESET
ADRV401~406 CLK,BLK,POL,STB
CN402
CN403
e-buffer
f-buffer
g-buffer
M O D E L
REMARKS
External : 2,4 On : 3 On
42" SD
1 2 3 4
OFF Internal
No. Item LVDS connector LED for operation check I2C connector 256K Y connector X connector CN401(E-address buffer connector) CN402(F-address buffer connector) CN403(G-address buffer] connector) Power connector Power fuse OPTION S/W
Explanation Connector for receiving RGB, H, V, DATAEN, DCLK encoded in the LVDS from image board. LED to show that Sync, clock is normally input into the logic board Connector connecting the Key Scan Board that checks and adjusts 256K data Eeprom to save table, APC table, driving waveform timing and other option, etc Connector to output control signal of the Y driving board Connector to output control signal of the X driving board Connector to output address data, control signal to the E-buffer board Cnnector to output address data, control signal to the F-buffer board Connector to output address data, control signal to the G-buffer board Connector to receive power 95V] to the logic board Fuse attached to power [5V] to the logic board Inner/Outer cut-off S/W
Logic Board
Function
- Processes Image signal (W/L, error dispersion, APC) - Outputs image signal as address driver control signal, data signal buffer board - Outputs the XY driving board control signal
Remarks
Logic Main
E Buffer board
- Delivers data signal and control signal to the right/right COF - Delivers data signal and control signal to the middle/lower COF - Delivers data signal and control signal to the Right/ Lower COF
Buffer Board
F Buffer boadr
G Buffer board
VPC3230
CVBS
20.25M K4S641632E K4S643232E ASI500 K4S643232E SDA6000 BA7657 VPC3230 20.25M 14.3181M K4S643232E M27V160
Y/C
Y/Pb/Pr/H/V
74HC4052
S-VHS Y/C
RS-232
DVI
DVI SOUND
D-SUB
D-SUB Sound
S-VIDEO
S-VIDEO/VIDEO Sound
18.432M
Y/C CN101
UPD64083
20M
L/R CN102
S-CVBS
TEA6425
Y/Pb/Pr
BA7657 TA1101
M-CVBS
TUNER 2 TUNER 1
VODEO
COMPONENT1
COMPONENT1 SOUND
COMPONENT2
COMPONENT2 SOUND
SOUND OUTPUT
RF INPUT
Sub-woofer Output
TV/Video/S-Video/Component 1,2(SD)
Component 1,2(HD)
32 32 32 0 0 0 1 7 0 0 0 16 0 0 0 32 32 32 0 0 0 0 63 63 63
PC
DVI
12. Option
ITEM PIX SHIFT SHIFT TEST PIX NUMBER SHIFT LINE SHIFT TIME COUNTRY TEMP PROTECT SNI DEMO SNI THROUGH VIDEO MUTE IRC AFN LANGUAGE CUSTOMER TUNER TV/Video/S-Video/Component 1,2(SD) Component 1,2(HD) 0 0 2 1 4 0 0 0 0 10 0 0 0 0
0 : OFF 1: ON 1 : THROUGH 0 : NOT THROUGH Unit : 100msec 0 : for customer 0 : English 0 : CE 0:1 TUNER 1 : for military 2 : Spanish
PC
DVI
0 : OFF 0 : minute
Remark
1 : ON 1 : second
Number of shifted Lines horizontally Number of shifted Lines vertically Time fixed at SHIFT TEST 0 : domestic 1 : USA 2 : Japan
* Dimensions in mm
Check Voltages on the SMPS (Vs,Va,Ve,Vset..) OK Check the damaged components on X,Y-Main & Address Board Yes
Connectors from
NO
NO Damaged Components Check the Fuses on X,Y-Main Boards (F4003,F5003) OK Change Y-Main NO Change X-Main NO NO Change the damaged Board
I can see some Video ex) TV,Video or etc Inputsource Check whether always No Video about all AV inputs
Digital
Alexander (V2)
Mozart (V3)
Nelson (V3)
Brightness Contrast ratio Tuner Audio out Sound Speaker Video input S-Video input Component Input Side Input DVI Power Consumption
700cd/m2 1200:1 2Tuner 10W x 2 Dolby Virtual Not Included 1Rear 1Rear 2Rear 1Rear 330W
1000cd/m2 3000:1 2Tuner 15W x 2 SRS Tru Surround XT Included 2Rear 1Rear 2Rear CVBS, S-Video 1Rear 330W
1000cd/m2 3000:1 1Tuner 15W x 2 SRS Tru Surround XT Not Included 1Rear 1Rear 1Rear 1Rear 330W
Etc.