ATMega8 uC

UART !!!

Universal Synchronous Asynchronous Receiver Transmitter

It is a Communication Protocol for serial data transmission developed by the EIA. Data is sent in the form of PACKETS or FRAMES which is compose of data bits and control bits..

DATA FIELD

STOP BIT

PARITY BIT

USART packet format: 1 start bit, 8 data bits, 1 parity bit, 1 stop bit.

Data Bits : 5-8 bits Stop Bit: 0 or 1 or 2 Parity Bit : Optional (Even or Odd)

BAUD RATE : The number of Symbols transmitted per second Typical Values are 1200, 2400, 9600, 19200 etc..
Mode Of Transmission: Asynchronous : No Clock Sharing Between Receiver And Transmitter Synchronous: Receiver And transmitter Works With Same Clock Frequency

Rx Tx

In Atmeaga8 PD0 is Receiver (RxD) PD1 is Transmitter (TxD)

USART NEEDS TO BE ENABLED BY THE USER THROUGH SOFTWARE

Serial Port

It is a set of 9 PINS used for serial data communication between two Cs or between C and a Computer.

THIS IS SERIAL PORT

RS-232
The RS-232 standard defines the voltage levels that correspond to logical one and logical zero levels in serial communication.

Valid signals are plus or minus 3 to 15 volts. The range near zero volts is not a valid RS-232 level.
Logic one is defined as a negative voltage and logic zero is positive.

Voltage Levels in Our Microcontroller are Logic High= 5Volt Logic Low= 0 Volt How Can a microcontroller communicate by using RS-232 Standard ?? Solution is MAX 232 IC

MAX 232 Connection

USART I/O DATA REGISTER

This Register stores the data to be transmitted or data being Received.

UDRE bit in UCSRA Register should be set and transmitter to be enabled for Data Transmission.

UCSRA-USART Control and Status Register A

RXC bit is set when data is available in the receive buffer and cleared when the receive buffer is empty.

TXC bit is set when data transmission is complete. UDRE bit is set when transmit buffer (UDR) is ready to receive new data

UCSRB-USART Control and Status Register B

RXCIE: Receive Complete interrupt will be generated if RXCIE bit is set. TXCIE: Transmit Complete interrupt will be generated if TXCIE bit is set. UDRIE: Data Register Empty interrupt will be generated if UDRIE bit is set. RXEN: To enable the USART receiver . TXEN: To enable the USART transmitter. UCsZ2: To set the character size in combination with bit UCZ1 and UCZ0.

UCSRC-USART Control and Status Register C

URSEL: This bit must be one to write the UCSRC. UMSEL: To select between Asynchronous and Synchronous mode.
UPM1 & UPM0: To Select Parity Bit.

USBS : To Select Stop Bit.

UCZ1 & UCZ0: To Select Character Size. UCPOL: To Select Clock Polarity.

UBRRL &UBRRH-USART Baud Rate Register

This Register Stores The Value of Baud rate . To write in the UBRRH , URSEL bit must be zero.

THANK YOU!!!