Hardwired vs Microprogrammed

Hardwired
Use

gates to generate signals Squeeze out the juice for performance Different logic styles possible

Microprogrammed
Store

the control signals in the sequence Just read from the memory every clock cycle

A Model Computer
(Richard Eckert, SIGCSE Bulletin, Vol. 20, No. 3, September 1988)
IP LP EP 8 PC 12 12 LM MAR ALU 12 Accumulator 12 S A EU 12 RAM 12 Register B LB LI EI 4 Bus Control LA EA

8
R W

12
LD ED 12 MDR IR

More Details
L = Load E = Copy to bus A,S = Add and Subtract Sign bit to control unit IP = Increment PC

IP LP EP

PC

ACC

LA EA

S LM

MAR

ALU

A EU

R W

RAM B

LB

LD ED

MDR
Bus

IR

LI EI

Control

Mnemonic Opcode
LDA
Load Accumulator

Action
A(Mem)

Register Transfers
1. MAR IR 2. MDR M(MAR) 3. A MDR 1. MAR IR 2.MDR A 3. M(MAR) MDR 1. AALU(Add) 1. AALU(Sub) 1. BA 1. PCIR 1. PCIR if NF is set

Active Controls
EI,LM R ED,LA EI,LM EA,LD W A,EU,LA S,EU,LA EA,LB EI,LP NF : EI,LP

STA
Store Accumulator

2 3 4 5 6 7

(Mem) A A A+B A A-B B A PC Mem PC Mem If ve flag is set Stop Clock IR Next Instruction

ADD SUB MBA JMP JN

HLT Fetch

8-15

1. MAR PC 2. MDR M(MAR) 3. IR MDR

EP,LM R ED,LI,IP

Hardwired Unit
IR
Opcode
LDA STA ADD CLK

Ring Counter
T1

T5

Decoder

SUB MBA JMP JN

Control Matrix

Halt

NF

Control Signals

Table with Sequencing

IP LP EP LM R W LD ED LI EI LA EA A S EU LB

Fetch T2 LDA STA MBA ADD SUB JMP JN T3 T3 *F

T0

T0 T3 T3

T1 T4 T5 T4

T2 T5

T2 T3 T3 T5 T4 T3 T3 T3 T3 T3 *F T3 T3 T3 T3 T3

IP = T2; LP = T3*JMP+T3*JN*NF; EP = T0; LM = T0+T3*LDA+T3*STA

R=T1+T4*LDA; W=T5* STA; LD = T4*STA; ED=T2+T5*LDA;

LI=T2; A = T3*ADD; S = T3*SUB; ..

Control Matrix
Implement using discrete gates Usually done using PLAs Large control matrices are implemented hierarchically

For

speed

A well known process and design flows are widespread

Lets Review the Microprogramming Model

Store the microprogram in control store Fetch the instruction Get the set of control signals from the control word Move the microinstruction address Lather, Rinse, Repeat

Problems With Hard Wired Designs

Complex sequencing & micro-operation logic Difficult to design and test Inflexible design Difficult to add new instructions

Micro programmed Control

Sequence login unit issues read command Word specified in control address register is read into control buffer register Control buffer register contents generates control signals and next address information Sequence login loads new address into control buffer register based on next address information from control buffer register and ALU flags

Micro Operation

A micro operation is an elementary operation performed on the information stored in one or more registers Examples are shift, count, clear, and load

RTN

RTN

It doesn't interact with the machine. It's purely a description of the Assembly language.

RTN