Analysis and Characterization of Different Voltage Follower Topologies

Guided By: Prof. Vijay Savani

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Prepared By: Jaymeen Aseem (09BEC003) Jay Padaliya (09BEC037)

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Project Review Phase-2

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Outline
1.

2.
3. 4. 5. 6. 7. 8.

9.

Super Source Follower (0.5 m design) 90 nm Technology Introduction Basic Source Follower Flipped Voltage Follower Threshold Independent Voltage Follower Source Coupled Pair Comparative Analysis of 90 nm Designs Conclusion References

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Super Source Follower

Circuit Diagram

Schematic Diagram

The circuit uses negative feedback through M2 to reduce

the output resistance. From dc standpoint, the bias current in M2 is difference between I 2 and I 1.
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Super Source Follower

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signal equivalent circuit is shown below:

I 2 > I 1 is required for the proper operation. The small

From figure,

I0

Vo Vo V2 gm 2V 2 r 2 ro 2 r1

V2 V 2 V 0 gm1Vo gmb1Vo 0 r1 ro1

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Super Source Follower

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Ro
g r

1 gm1 gm 2 ro1
VDD VGS 2VDsat .

So, output resistance of source follower is reduced by factor m2 o1. Voltage headroom around output node is

So a tradeoff between output swing and minimum

supply voltage should be made. Super source follower is designed to have less power and area requirement than the basic source follower. But, it also has some limitations. The negative feedback loop through M2 may not be stable in all cases. So, non-linearities may be observed in transient analysis.
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Super Source Follower

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Transient Analysis

Super Source Follower

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DC Analysis

Super Source Follower

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AC Analysis

Super Source Follower

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Simulation Results (For the Super Source Follower)

Parameter
Output Voltage Swing Power Dissipation

Value
0.8 Volts for 1 V pp input 18.45 W

Offset Voltage
Bandwidth No. of Transistors

814.71 mV
656.37 MHz 2

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Super Source Follower

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Comparison Between Basic Source Follower and Super Source Follower

Topology Power Bandwidth Voltage Offset Dissipation Gain Voltage
187.8 W 37.218 MHz 656.37 MHz 0.9 1.2022 Volts 0.814 Volts

Basic Source Follower Super Source Follower

18.45 W

0.8

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Comparison Between Various Topologies

Topology Source follower Super source follower Flipped voltage follower Threshold Independent Voltage Follower
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Output resistance
1 g m1
1 gm 2 gm1ro1 1 gm 2 gm1ro1

Output Swing

VDD VGS VDsat VDD VGS 2VDsat VGS 2VDsat

1 1 gm1 gm 2

VDD 2VDSAT
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90 nm Design
We have implemented four voltage follower designs in

0.5 m technology. Now, we will implement them in 90 nm technology using Mentor Graphics tool. We will analyze them by using pre-layout simulation. For 0.5 m technology, the minimum channel length is 0.5 m. While, for 90 nm design, it is 100 nm. With technology scaled down, the channel length and width are scaled down. Accordingly, the parameters like supply voltage, threshold voltage are also scaled down. The scaled parameters affect the characteristics of voltage follower design. The major difference is in the DC analysis. DC analysis shows the relationship between output voltage and input voltage.
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 For the 0.5 m design, the DC characteristics is linear in nature. But, for 90 nm design, it is somewhat nonlinear (parabolic in nature). This is the major problem associated with the deepsubmicron technologies design of voltage follower. As the technology is scaled down, the threshold voltage VT is not scaled down proportionally. So, this non-linear behavior of threshold voltage cause performance of design to deviate from ideal one. The supply voltage taken for 0.5 m design is 3.3 volts. For the 90 nm design, it is taken as 1.8 volts.

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90 nm design

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Voltage Follower Topologies for 90 nm design

For 90 nm design, we consider three topologies: 1. 2. 3.

Basic Source Follower Flipped Voltage Follower Threshold Independent Voltage Follower We will analyze them by applying transient analysis, DC analysis and AC analysis.

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Basic Source Follower

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Basic Source Follower

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Transient Analysis

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Basic Source Follower

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 For the full output swing, we have to keep input current larger. This waveform is for 1000 A input current source. Previous waveform was for 10 A current source. But for larger current, the power dissipation is also larger.
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Basic Source Follower

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DC Analysis

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Basic Source Follower

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AC Analysis

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Basic Source Follower

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Simulation Results for Basic Source Follower

Parameter
Output Voltage Swing Power Dissipation

Value
1.95 Volts for 2 V pp input 15.8 W (for 10 A current source) 203.57 W (for 100 A current source)

Offset Voltage Bandwidth No. of Transistors

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2.03 Volts 55.6 GHz 1

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Basic Source Follower

Basic Source Follower using PMOS Load

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Basic Source Follower

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Simulation Results for PMOS Load Basic Source Follower

Parameter
Output Voltage Swing Power Dissipation Offset Voltage Bandwidth No. of Transistors

Value
1.85 Volts for 2 V pp input 58.04 W 0.540 Volts 44.05 GHz 2

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Basic Source Follower

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Basic Source Follower using Current Mirror

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Basic Source Follower

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Simulation Results for Current Mirror Based Basic Source Follower

Parameter
Output Voltage Swing Power Dissipation

Value
1.85 Volts for 2 V pp input 17.04 W

Offset Voltage
Bandwidth No. of Transistors

0.294 Volts
32.18 GHz 3

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Basic Source Follower

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Difference for 500 nm and 90 nm designs

Design Power Bandwidth Dissipation 187.8 W 15.8 W 37.12 MHz 32.5 GHz Offset Voltage 1.2022 Volts 2.03 Volts Voltage Swing 0.95 0.9

500 nm 90 nm

The major difference is in the DC characteristics. The 90 nm design has non-linear transfer characteristics as compared to the 500 nm design. The power dissipation for 90 nm design is low. But the output voltage swing is limited. The bandwidth is also increased in 90 nm design.
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Basic Source Follower

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Flipped Voltage Follower

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Flipped Voltage Follower

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Transient Analysis

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Flipped Voltage Follower

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DC Analysis

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Flipped Voltage Follower

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AC Analysis

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Flipped Voltage Follower

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Simulation Results for Flipped Voltage Follower

Parameter
Output Voltage Swing Power Dissipation Offset voltage Bandwidth

Value
1.8 Volts for 2V pp input 10.04 W 1.13 Volts 5.8 GHz

No. of Transistors

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Flipped Voltage Follower

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Difference Between 90 nm and 500 nm Designs

Design Power Bandwidth Dissipation 14.4 W 10.04 W 6.088 MHz 5.8 GHz Offset Voltage 1.86 Volts 1.13 Volts Voltage Swing 0.9 0.9

500 nm 90 nm

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Flipped Voltage Follower

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Threshold Independent Voltage Follower

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Threshold Independent VF

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Transient Analysis

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Threshold Independent VF

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DC Analysis

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Threshold Independent VF

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AC Analysis

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Threshold Independent VF

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Simulation Results for Threshold Independent VF using Ideal Current Source

Parameter
Output Voltage Swing Power dissipation Offset Voltage Bandwidth No. of Transistors

Value
1.95 Volts for 2 V pp input 21.10 W 99.8 mV 8.5 GHz 2

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Threshold Independent VF

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Comparison of 90 nm design and 500 nm designs

Design Power Bandwidth Dissipation 115.5 W 21.10 W 34.52 MHz 8.5 GHz Offset Voltage 55.72 mV 99.8 mV Voltage Swing 0.95 0.95

500 nm 90 nm

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Threshold Independent VF

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Source Coupled Pair

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Source Coupled Pair

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Transient Analysis

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Source Coupled Pair

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DC Analysis

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Source Coupled Pair

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AC Analysis

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Source Coupled Pair

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Simulation Results for Source Coupled Pair Voltage Follower

Parameter
Output Voltage Swing

Value
1.95 Volts for 2 V pp input

Power Dissipation
Offset Voltage Bandwidth No. of Transistors

48.27 W
2.33 mV 6.8 GHz 2

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Source Coupled Pair

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Comparative Analysis for 90 nm and 500 nm Designs

Design Power Bandwidth Dissipation 99.88 W 48.27 W 14.95 MHz 7.8 GHz Offset Voltage 9.09 mV 2.33 mV Voltage Swing 0.975 0.95

500 nm 90 nm

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Source Coupled Pair

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Future Work
We

have shown the pre-layout simulation of three topologies in 90 nm technology. We have also shown super source follower design in 500 nm technology. In next phase, we will implement the remaining designs in 90 nm technology with pre-layout simulation. Also, we will show the post-layout simulation of all topologies in 90 nm. We will analyze the pre-layout and post-layout simulation results for 90 nm technology.

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Conclusion
The voltage follower designs in 90 nm and 500 nm

technologies give the different outputs. For 500 nm design, the transfer characteristic is linear in nature. While, for 90 nm it is non-linear. For 500 nm design, the power dissipation is high. The supply voltage requirement is also high. For 90 nm design, power dissipation is low. Supply voltage can be reduced from 3.3 V to 1.8 V or even further (up to 1.0 V). The area requirement for 90 nm design is obviously low compared to 500 nm design.

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References
[1] Behzad Razavi, Design of Analog CMOS Integrated Circuits, McGraw-Hill

publication, 2001. [2] P. E. Allen and D. R. Holberg, University Press, 2002. CMOS Analog Circuit Design, Oxford

[3] Harry W. Li, R. Jacob Baker and David E. Boyce, CMOS Circuit Design, Layout and Simulation, IEEE Press Series on Microelectronics Systems, 2005. [4] Franco Maloberti, Analog Design for CMOS VLSI systems, Kluwer Academic/Plenum Press, 1998. [5] Yahoui Kong, Shuzheng Xu and Huazong Y, An Ultra Low Output Resistance and Wide Swing Voltage Follower, ICCCAS 2007, pp. 10071010, July 2007. [6] Carvajal R.G., Ramirez-Angulo J., Lopez-Martin A.J., Torralba A. Galan, J.A.G. Carlosena A. and Chavero F.M., The Flipped Voltage Follower: A Useful Cell for Low Voltage Low Power Circuit Design, IEEE circuits and systems, pp. 1276-1291, July 2005. [7] Gaurang P. Banker, Amisha P. Naik and N.M. Devashrayee, Comparative Analysis of Low Power CMOS Class-A Voltage Followers with Current Mirror as a Load, International Journal of Electronics and Communication Technology (IJECT), to appear in vol.2 Issue. 2, June 2011.
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THANK YOU

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