ANALOG

ELECTRONICS II
BEE2233

Week 5 Chapter II - FET DC BIASING- E-MOSFET

Mohd Shawal Jadin
 Enhancement­Type MOSFET
The transfer characteristic for the enhancement­type MOSFET is very different from that 
of a simple JFET or the depletion­type MOSFET.
 Feedback Biasing Arrangement

 IG =0A, therefore VRG = 0V
Therefore:  VDS = VGS

Which makes  VGS = V DD − I D R D
 Feedback Biasing Q­Point

• Plot the line using VGS = VDD, ID = 0 and ID = VDD / RD and VGS = 0
• Plot the transfer curve using VGSTh , ID = 0 and VGS(on), ID(on); all given in the 
specification sheet.
• Where the line and the transfer curve intersect is the Q­Point.
• Using the value of ID at the Q­point, solve for the other variables in the bias 
circuit.
 DC analysis step for Feedback Biasing
Enhancement type MOSFET
• Find k using the datasheet or specification given;
ex: VGS(ON),VGS(TH)
• Plot transfer characteristics using the formula
ID=k(VGS – VT)2.
• Three point already defined that is ID(ON), VGS(ON)
and VGS(TH)
• Plot a point that is slightly greater than VGS
• Plot the linear characteristics (network bias line)
• The intersection defines the Q-point
 Voltage­Divider Biasing

Again plot the line and the transfer curve to find the Q­
point.

Using the following equations: 

R2VDD
Input loop : VG =
R1 + R2

VGS = VG − I D RS

Output loop :
VDS = VDD − I D ( RS + RD )
 Voltage­Divider Bias Q­Point

• Plot the line using VGS = VG = (R2VDD)/(R1 + R2), ID = 0 and ID = 
VG/RS and VGS = 0

• Find k

• Plot the transfer curve using VGSTh, ID = 0 and VGS(on), ID(on); all 
given in the specification sheet.

• Where the line and the transfer curve intersect is the Q­Point.

• Using the value of ID at the Q­point, solve for the other variables 
in the bias circuit.
 Example

Determine the value

of :
IDQ
• VGSQ
• VDSQ
• VD
• VS

8
 Solution

For graphical method:

•Find k (answ: 0.556 mA/V2)

•Plot the transfer curve by using equation, ID=k(VGS –
VT)2.
•Plot the dc line by using dc equivalent circuit
• determine Q point
Input loop : VG = R2VDD
R1 + R2
VGS = VG − I D RS
Output loop : VDS = VDD − I D ( RS + RD )

9
 Solution

• IDQ = 5.5 mA and VGSQ = 6.2 V

VDSQ = VDD − I D ( RS + RD ) = 14.93V
• VDSQ
VD = VDD − I DQ RD = 11.9V
• VD
• VS VS = I D RS = 4.13V

10
 Discussion 1

Determine the value

of VDSQ

11
 Discussion 2

What are the

voltages across
RD and RS?

12
 =-
=
=
= -

=-
= -

=
+
= -
= - ( + )

=
= -

=
+
= -
 Design

For the design, we need to

consider at least 4 things;
 Area of application
 Level of amplification
 Signal strength
 Operating condition

Design using the middle values

Examples
of transfer characteristics is
preferable
 P­Channel FETs

For p­channel FETs the same calculations and graphs are used, except that the voltage 
polarities and current directions are the opposite. The graphs will be mirrors of the n­channel 
graphs.
 Practical Applications

• Voltage­Controlled Resistor

• JFET Voltmeter

• Timer Network

• Fiber Optic Circuitry

• MOSFET Relay Driver
 Test 1:
Tuesday Night 10 Feb 2009
Chapter 1 & 2 only

Lab 1:
1st week – Theory, simulation &
calculation
2nd week (now) – hardware experiment
3rd - hardware experiment
Thank You 4th week – writing final report &
submission

End of Chapter 2

18