Fault Tree Analysis

UTVT_Avila

INTRODUCTION
Fault tree analysis (FTA) is performed in the industry to evaluate engineering systems during their design and development, A fault tree is a logical representation of the relationship of primary events that lead to a specified undesirable event called the top event and is depicted using a tree structure with OR, AND, etc. logic gates.

FTA PURPOSES AND PREREQUISITES

Purposes
Identification of critical areas and costeffective improvements Understanding the functional relationship of system failures Providing input to test Maintenance and Operational policies and procedures

FTA PURPOSES AND PREREQUISITES

Purposes
understanding the level of protection that the design concept provides against failures, evaluating performance of systems/equipment for bid-evaluation purposes, providing an integrated picture of some aspects of system operation, confirming the ability of the system to meet its imposed safety requirements, and providing input to cost-benefit trade-offs.

FTA PURPOSES AND PREREQUISITES

Purposes
understanding the level of protection that the design concept provides against failures, evaluating performance of systems/equipment for bid-evaluation purposes, providing an integrated picture of some aspects of system operation, confirming the ability of the system to meet its imposed safety requirements, and providing input to cost-benefit trade-offs.

FTA PURPOSES AND PREREQUISITES

Prerequisites.
thorough understanding of design, operation, and maintenance aspects of system/item under consideration clear definition of what constitutes system failure a comprehensive review of system/item operational experience well-defined level of analysis resolution

FTA PURPOSES AND PREREQUISITES

Prerequisites.
clear identification of associated assumptions; and clearly defined system/item physical bounds and system interfaces.

FAULT TREE SYMBOLS

Rectangle. Represents a fault event that results from the logical combination of fault events through the input of the logic gate.

FAULT TREE SYMBOLS

Circle. Denotes a basic fault event or the failure of an elementary part. The fault events probability of occurrence, failure, and repair rates are usually obtained from empirical data.

FAULT TREE SYMBOLS

Diamond.Denotes a fault event whose causes have not been fully developed either due to lack of interest or due to lack of information.

FAULT TREE SYMBOLS

Triangle A. Denotes transfer in and is used to avoid repeating segments of the fault tree.

FAULT TREE SYMBOLS

Triangle B. Denotes transfer out and is used to avoid repeating segments of the fault tree.

FAULT TREE SYMBOLS

AND gate. Denotes that an output fault event occurs only if all of the input fault events occur.

FAULT TREE SYMBOLS

OR gate. Denotes that an output fault event occurs if one or more of the input fault events occur.

FUNDAMENTAL APPROACH TO FTA

The development or construction of a fault tree is top-down, in that the undesirable or top event is the tree root and the logical combination of sub-events are employed to map out the tree until reaching the basic initiating fault events. Nonetheless, steps such as those listed below are involved in performing FTA

FUNDAMENTAL APPROACH TO FTA

Define system, analysis associated assumptions, what constitutes a failure, etc. If the simplification of the scope of the analysis is necessary, develop a simple system block diagram showing relevant inputs, outputs, and interfaces. Identify undesirable or top fault events to be analyzed and if necessary develop fault trees for all top-level events. Identify all the causes that can make the top event occur using fault tree symbols and the logic tree format. More specifically, using deductive reasoning highlight event that can lead to the occurrence of the top event.

FUNDAMENTAL APPROACH TO FTA

Assuming the causes of the previous step as intermediate effects, continue developing the logic tree by identifying the causes of these intermediate events. Develop the fault tree to the lowest level of detail as required. Perform analysis of the completed fault tree with respect to understanding the logic and the interrelationships among various fault paths, gaining insight into the unique modes of product faults, etc.

FUNDAMENTAL APPROACH TO FTA

Determine appropriate corrective measures. Prepare documentation of the analysis process and follow up on identified corrective measures.

Example of FTA
Assume that a windowless room has a switch and four light bulbs. Develop a fault tree for the top or undesired fault event dark room (i.e., room without light). Assume that the room can only be dark if all the light bulbs burn out, there is no electricity, or the switch fails to close.

Solution to example of FTA

A fault tree for this example is. Each fault event in the figure is labeled as B1, B2, B3, , B10.

BOOLEAN ALGEBRA RULES

AA=A

A+A=A
X(Y + Z) = XY + XZ X + YZ = (X + Y) (X + Z) AB = BA A + B = B+ A X + XY = X X(X + Y) = X

ANALYTICAL DEVELOPMENTS OF BASIC GATES

OR GATE An m input fault events A1, A2, A3, , Am OR gate along with its output fault event A0 in a Boolean expression. Thus, mathematically, the output fault event A0 of the m input fault event OR gate is expressed by

where Ai is the ith input fault event; for i = 1, 2, 3, , m.

ANALYTICAL DEVELOPMENTS OF BASIC GATES

AND GATE Ak input fault event X1, X2, X3, , Xk AND gate along with its output fault event X0 in a Boolean expression. Thus, mathematically, the output fault event X0 of the k input fault event AND gate is expressed by

REPEATED FAULT EVENTS

In this case, the repetition of A must be eliminated prior to obtaining the quantitative reliability parameter results for the fault tree. Otherwise, the quantitative values will be incorrect. The elimination of repeated events can either be achieved by applying the Boolean algebra properties such as presented or algorithms especially developed for this Purpose.

Example
Use Boolean algebra properties to eliminate the repetition of the occurrence of event A. Construct the repeated event free fault tree using the simplified Boolean expression for the top event.

PROBABILITY EVALUATION OF FAULT TREES

OR GATE Using independent input events, the probability of occurrence of the output fault event A0 is given by

For m = 2,

PROBABILITY EVALUATION OF FAULT TREES

AND GATE Using Figure 7.4, for independent input fault events, the probability of occurrence of the output fault event X0 is

NON-REPAIRABLE COMPONENTS
In this case, the basic fault events, say, representing component failures of a system, are not repaired but their probabilities of occurrence are known Assume the probability of occurrence of basic events B1, B2, B3,B4,B5, B6, and B7are 0.15, 0.15, 0.15, 0.15, 0.06, 0.08, and 0.04, respectively. Calculate the probability of occurrence of the top event: room without light.

NON-REPAIRABLE COMPONENTS

REPAIRABLE COMPONENTS
In this case, the basic fault events, say, representing component failures of a system, are repaired and the failure and repair rates of the components are known. Thus, using the Markov method, the unavailability of a component is given by

REPAIRABLE COMPONENTS
We can get the steady state probability of occurrence of the output fault event A0 of the OR gate as follows:

REPAIRABLE COMPONENTS
Similarly:

Example
Assume that in Figure 7.2 failure and repair (in parentheses) rates associated with basic events B1, B2, B3, B4, B5, B6, and B7are 0.0002 failures/h (4 repairs/h), 0.0002 failures/h(4 repairs/h), 0.0002 failures/h (4 repairs/h), 0.0002 failures/h (4 repairs/h), 0.0001failures/h (0.004 repairs/h), 0.00015 failures/h (4 repairs/h), and 0.0001 failures/h(0.004 repairs/h), respectively. Calculate the steady state probability of occurrenceof the top event: room without light.

Example
We get the following steady state probability of occurrence of events B1, B2, B3, and B4:

the following steady state probability of occurrence of events B5 and B7 is obtained:

we get the following steady state probability of occurrence of event B6:

Example
We get the following steady state probability of occurrence of event B8:

We obtain the following steady state probability of occurrence of event B9:

The following steady state probability of occurrence of event B10 is obtained: Thus, the steady state probability of occurrence of the top event, room without light, is 0.0482.

Fault tree result