pool circuit

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Objective
To design a divider and multiplier using pool circuits. Pool is an analog circuit which performs arithmetic operations.

dividers/multipliers are used in Analog computational circuits. Analog signal processing. AM modulators.

In direct implementation
MOS are in triode region. It limits the high frequency of operation. It has high cost. Large power consumption. High area.

Pool is an arithmetic circuit It basically performs the function of addition and subtraction. The use of pool will introduce high level of abstraction. The design and analysis become easy.

The working principle of pool is based on biological neurons . Where the concentration of a chemical pool depends on the synthesis and degradation of chemicals. The synthesis is taken as inward current the degradation taken as outward current.

NEURAL POOL
The

equilibrium state of pool concentration is defined when Inward current = outward current

Pool Circuit Analysis

Arithmetic circuit Basic building block of divider and multiplier. Aim : Both addition and subtraction Divider=3 , multiplier 11.

CIRCUIT DIAGRAM
Saturation

& Identical Implement adder , subtractor, sign inverter ..using above circuit.

Iin=k(Va-Vb);

Iout=k(Vc-Vd); Iin=Iout (equil.) k(Va-Vb)= k(Vc-Vd); (Va-Vb)=(Vc-Vd) : k=k

ADDER
Iin=k(Va-Vo); Iout=k(0-Vd); Iin=Iout (equil.) k(Va-Vo)= k(0-Vd); Vb=(Va+Vd) : k=k

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SUBTRACTOR
Iin=k(Va-Vo); Iin=Iout (equil.) k(Va-Vo)= k(Vc-0); (Vo)=(Va-Vc) : k=k Iout=k(Vc-0);

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SIGN INVERTER
Iin=k(0-Vo); Iout=k(Vc-0); Iin=Iout (equil.) k(0-Vo)= k(Vc-0); Vo=(-Vc) : k=k

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MODIFIED POOL CIRCUIT

Both addition and subtraction. Aim to develop divider and multiplier. Iin=k(Va-Vo); Iout=k(Vc-Vd); Iin=Iout (equil.) k(Va-Vo)= k(Vc-Vd); (Vo)=(Va+Vc-Vd) : k=k (Vo)=(V1+V3-V4)

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Pool Circuit Results

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DIVIDER CIRCUIT
The

basic idea to realize the divider is to utilize the following equation: (a-b)^2(a+b)^2=4ab=c where b and c are input and a is the output signal.
All

transistors are in saturation.

The

gate-to-source voltages of the devices MA and MB can be given as: VGSA VGSB
The

= =

VB VB

VO VO

+ +

VT VT

drain currents of MA and MB are: I1-I2 = KA(VB-VO)^2 - KA(VA+VO)^2

The

current I3 can be approximated as I3 = gmVC if (2IC/KC)>>VC^2 where gm = sqrt(2KCIC)

The

division operation can be obtained with VO = gmVC/(4 KA VB)

The

following condition should be satisfied for proper operation: -VB < VO < VB

MULTIPLIER CIRCUIT

Advantages of pool circuit

Many functions can be implemented. No resistors are required.

- avoid power dissipation - reduced area requirement - makes analysis simpler.

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 Improved differential amplifiers are used. - improve accuracy of results. - increase the range of input voltages.

Regulated current mirrors are used. - high output resistance.

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Divider and multiplier using pool circuit

Advantages Replaces passive resistors and MOS transistors biased in triode region -Accuracy increases -high frequency operations can be done. - low cost -reduced power consumption -reduced chip area

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Disadvantages

Second order effects -Channel length modulation -mobility reduction -transistor mismatch

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Applications of divider and multiplier

Expected to be useful in analog signal processing applications. -radar -communications -industrial controls

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References
[1] S. W. Tsay and R. W. Newcomb, "A NEURALTYPE POOL ARITHMETIC UNIT," Microsystems Laboratory Electrical Engineering Department University of Maryland. [2] S. Vlassis and S. Siskos, "ANALOG CMOS FOUR-QUADRANT MULTIPLIER AND DIVIDER," Electronics Laboratory, Department of Physics, Aristotle University of Thessaloniki.

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THANK YOU

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