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SUBJECT INTRODUCTION
LECTURERS
1. Dr. Nasim Ahmed (c) Communication Eng. (RK 53) 2. Dr. Layth Abdulkareem Computer Eng. (RK 20) 3. En. Muhamad Sani Bin Mustafa Network Eng. (RK 93)
Grading:
Examination = 70% Test 1 = 10%
Test 2 = 10%
Final Exam = 50%
Reference Books
R.S. Gaonkar, Microprocessor Architecture, Programming and Applications with the 8085, 5th Edition, Prentice Hall, 2012 ii. W. Kleitz, Microprocessor and Microcontroller Fundamentals: The 8085 and 8051 Hardware and Software, Prentice hall, 1998 i.
Teaching Plan
Important Dates
WEEK SIX (6) Test 1(27th Mar 2014) WEEK TWELVE (12) Test 2 (22nd May 2014)
Note: Test will conduct at night from 8.30 pm to 10 pm. The place will announce later.
MINI PROJECT START Week 10th (Apr 28- May 4) Mini Project Viva (26, 27 and 28 th May)
Mini Project
Groups of 4 (max). Title can be your own, recommended to work towards the RPS i-project. Please consult Lecturers or PLVs for clarification on project suitability. Will be asked to submit proposal.
Outline
Chapter 1: Introduction to Microprocessor System Briefing regarding of course curriculum. Basic architecture of digital computer Memory system Input/output devices Microprocessor interface Busses & typical control system
OUTLINE
Chapter 2 : Computer Operation
Sequential machine. Function memory system. Instruction cycle. Instruction decoder and control logic. The program counter. 8085 internal architecture. Register file and other 8085A CPU. ALU subsystem. The flag register. 8085A bus interface.
OUTLINE
Chapter 3 : CPU Sequencing
Introduction cycles Machine cycles. T-states State diagram State processor functions and other states
OUTLINE
Chapter 4: Assembly Language Programming
Introduction to assembly language programming, 8085A, Instruction set Programming model. Data transfer instruction Arithmetic instruction Logic instruction Branch instruction. Stack. I/O and machine control instruction.
8085A address space memory and I/O instruction I/O decoding I/O mapping I/O device (8255)
Chapter 6: The Programmable Peripheral Interface (8255A) Features of 8255A Architecture Block functions Interface Address and initialization. Mode of word I/O interface to real world device (LED, switches, 7 segments display, etc)
Chapter 7: Interrupts
Interrupts event sequence. Direct and vectored interrupts. Maskable and non-maskable interrupts. Interrupt priority and machine cycle involved.
Download the lab sheet and relevant materials from portal / e-learning.
THANK YOU