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1) Topics 2) Course outline & Evaluation Strategy 3) References 4) Homework Problems(#1, 2, 3) and term projects
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Introduction to VLSI
Lecture_1 #2
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Lecture_1 #3
Lecture_1 #4
Lecture_1 #5
History of IC Development
Korean History
2) Role of ICs in present & future 3) SIA Technology Roadmap 4) Future Challenges
Introduction to VLSI Lecture_1 #6
1) Historical Perspective
Change of Human Life & Major Industry Phase I
Major Industry Hunting, Fishing Cattle Breeding Agriculture
?
Phase Duration(years) 104~103 (several thousand years)
Phase II
Achievement Feeding Stable Feeding Stable Feeding
Phase III
Activity Domain raw material(m) domesticated m domesticated m m deformation (with energy) new material & new energy Information, idea
Lecture_1 #7
II
103~102 Machinery Mass Production (several hundred years) Chemistry, Nuclear Environment Pollution 102~ ? (several ten years?) Electronics Information Control, Computing and Communication
III
Introduction to VLSI
Questions thereof
Between phase I&II, how much mass is needed to store/produce some energy, E ? 2
E = mc (Einstein)
Between phase II&III, the question is, how much energy is needed to store/transmit/transform some information, I ?
E = ln I(Shannon)
What is the bottleneck(most limiting resource) in information age, among(Mass, Energy and Idea) ?
I = exp(energy, mass, or population)
Amount of information is proportional to exp(population), and so is value of idea. Probability of coming up with the best idea is exp-1 (population).
Introduction to VLSI
Lecture_1 #8
History of IC Development
Mechanical Computing Device 1642, Pascal : Counter Wheel Calculator for(+, -)
) 1671, Leibniz : Counter Wheel for(+, -) and Chain & Pulley for( ,
1823, Babbage : Difference Engine for Table Construction using Finite Difference
data
Card Punch
Introduction to VLSI
Lecture_1 #10
Bipolar Transistor
before 1947 : semiconductor used only for thermistors, photodiode, and rectifiers 1948, Bardeen & Brattain : point-contact transistor 1949, Schockley : Junction diode and Bipolar Junction Transistor(BJT) theory published
MOSFET(IGFET, MISFET)
1930, Lilienfeld & Heil : proposed the principle 1960, Kahng( ) & Atalla : first demo. of MOSFET (Silicon planar process)
Logic gate
1956, Harris : bipolar digital logic gate 1960, Fairchild, Inc : commercial logic gate IC(Fairchild Micrologic) 1962, Beeson : TTL(Transistor-Transistor Logic) 1974, Masaki : ECL(Emitter-Coupled Logic) 1972, Hart : I2L(Integrated-Injection Logic)
Introduction to VLSI Lecture_1 #11
CMOS technology
Wanlass(Fairchild) Patent on CMOS concept & inverter, NAND and NOR gates
CMOS initially used only for low-power applications such as wrist watch chip, due to process & area overhead CMOS acceptance widened as VLSI era comes in to solve the power consumption problem.
Introduction to VLSI
Lecture_1 #12
Korean IC History
~ 1960 : Signetics, Fairchild, Motorola Korea, Anam : IC assembly 1972 : (:) by Applewine Paradise, Inc. Sold to Samsung in 1976 ; Produced CMOS Watch Chips ~ 1970 : KIST () ; moved to , KIET in 1978(?) 1975 : KAIST () 1976 : ; sold to ; merged KIET facility in Kumi in 1980(?) 1983. 12 : Samsung developed 64K DRAM with Microns mask 1985 : Hyundai joined DRAM race with , LG 1993-1995 : All three highly profitable due to good DRAM market. 1995/2H : DRAM price fall begins. Now : System industries as well as semiconductor industries rely on non-memory IC for their future.
Introduction to VLSI Lecture_1 #13
() : 100 20
100 : 1Km/liter
now : 20Km/liter
Semiconductor IC technology
CPU speed : 100-fold increase in 10 years Memory storage density : 4-fold increase in every 3 years
IC is the most efficient means for the storage(memory), processing(ASIC, processor), and transmission(communication chip) of information. Ever more intelligence is being put into almost all things :
Car : from mechanical stuff, to a system with various control, computing, communication occurring within .
IC performs information processing being connected with other ICs through interconnection within a Board, and possibly running software downloaded from a memory module. Board
CHIP #2
CHIP #1
CHIP #3
Memory (SW)
Introduction to VLSI
Lecture_1 #16
IC Design Environment
Interconnection
IC ( Hardware )
Software
CAD
Library
Process Integration
Material Lithography
Introduction to VLSI
Lecture_1 #17
Design & Test Process Integration, Device & Structures Front End Process Lithography Interconnect Factory Integration Assembly & Packaging
ESH(Environment, Safety and Health) Defect reduction Metrology Modeling & Simulation
Introduction to VLSI
Lecture_1 #18
Year DRAM Half-pitch(nm) MPU Gate Length(nm) DRAM samples DRAM production DRAM bits/cm2
16G 64G 4G 4G
64M 256M
1G
1G
18M
24M
Introduction to VLSI
Lecture_1 #19
Year
Number of Chip I/Os( high perf.) Number of Chip I/Os( low cost)
600
1100 750
810
1500 1250
900
1800 1500
1100
2200 2100
750
250
Introduction to VLSI
Lecture_1 #20
Year
Chip Size(DRAM) mm2 Chip Size(Microprocessor) mm2 Chip Size(ASIC)[max litho field ]
22x22 25x32 25x34 25x36 25x40 25x44 25x52 484 800 850 900 1000 1100 1300 6 6-7 7 7 7-8 8-9 9
Introduction to VLSI
Lecture_1 #21
Year Minimum mask count Substrate Diameter(mm2) Bulk or epitaxial or SOI wafer Power Supply, Vdd(V)
Max. Power High-performance with heat sink(W)
1997 22 200
2001 23 300
2003 24 300
2012 28 450
1.8-2.5 1.5-1.8 1.2-1.5 1.2-.15 0.9-1.2 0.6-0.9 0.5-0.6 70 1.2 90 1.4 110 1.7 130 2.0 160 2.4 170 2.8 175 3.2
Introduction to VLSI
Lecture_1 #22
2003 130
4) Grand Challenges
Ability to continue scaling according to Moores law
( new material, technologies, approaches must be invented )
No materials exist that are optically transparent for <= 193nm through-the-lens exposure scheme impossible totally new scheme needed high conductivity interconnection (copper) low- dielectric good contact material
10 GHz : = 3cm comparable to chip size (treating circuit & packaging as a whole)