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4/2/2014
Stack
Data Structure
0
. . .
first word
SP
top element
. . .
Register
Stack
BOTTOM
Operations
. . .
2k-1
last word
Memory
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Stack Operations
Push
Pop
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Register Indirect Contents of register automatically decremented before accessing the operand
Register Indirect Contents of register automatically incremented after accessing the operand
MOVE ITEM,-(SP)
Autoincrement (Pop)
MOVE (SP)+,ITEM
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Stack Overflow
Check for stack limits before push and pop Compare src,dst
SAFEPOP
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Queue
Data Structure
0
. . .
first word
First-In-First-Out
OUT
Two Pointers
Queue
IN
. . .
Operations
. . .
2k-1
last word
Memory
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Subroutines
Reusable subtask Operations
Call
Store contents of the PC in the LINK register Branch to the target address
Return
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Nesting Subroutines
Subsequent subroutine calls destroy return address in LINK register Last subroutine returns to subroutine that called it
Retrun address are last-in-first-out Call pushes PC onto stack Return pops return address off stack into PC
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Parameter Passing
Program passes parameters to subroutine Subroutine returns parameters to calling program Passing Methods
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Subroutine
LISTADD CLEAR LOOP ADD DEC BGTZ RETURN R0 (R2)+,R0 R1 LOOP
SUM N NUM1
. . .
NUMn
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#NUM1,-(SP) N,-(SP) LISTADD 1(SP),SUM #2,SP R0-R2,-(SP) 4(SP),R1 5(SP),R2 R0 (R2)+,R0 R1 LOOP R0,5(SP) (SP)+,R0-R2
Level 4
[R2]
[R1] [R0]
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Stack Frame
Private workspace for subroutine
Created at subroutine call Contains parameters and local variables Freed up when subroutine returns
General purpose register Fixed during subroutine execution Provides easy access to parameters and variables
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http://www.arm.com/
PlayStation Portable Nintendo DS iPod
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Register Structure
31 0
R0 R1
. . .
R14
(PC) R15
Program Counter
Status Register N Z
C V
...
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Instruction Format
Condition OP code Rn Rd Other info Rm
Assembly Language
RTN
R0 [R2] + [R4]
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Instruction Set
See Appendix B
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Addressing Modes
Name Immediate Register Absolute (Direct) Syntax #Value Ri LOC Addressing Function Operand = Value EA = Ri EA = LOC
EA = Effective Address
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R1 R2 R3
SUM N NUM1
. . .
NUMn
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Performance Equation
Processor Execution Time (T) Number of Machine Language Instructions (N) Average Steps per Machine Instruction (S) Clock Rate (R)
NS T R
CISC vs RISC
Complex Instruction Set Computers (CISC)
Smaller N Larger S
Larger N Smaller S Easier to Pipeline
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Questions?
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