N.

Senthil Kumar,
M. Saravanan &
S. Jeevananthan
Oxford University Press 2013

HARDWARE FEATURES OF 8051
Oxford University Press 2013
Introduction
The major benefit of microcontrollers lies in their built-
in parallel ports. The parallel ports can be used to
interface all data converters (ADCs, DACs, etc.) and
display devices (LEDs, LCDs, etc.).
Any microcontroller-based system needs to transfer
data between the external peripherals and the
microcontroller. The microcontroller needs to read data
fed by the user from the external interface, process it,
and give the output to the peripherals or to the user
again. To communicate data with the external world,
the microcontroller needs ports. The ports may
support either parallel or serial data transfer.

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Parallel Ports of 8051
8051 has 4 I/O ports namely Port0, Port1, Port2 and
Port3. The major constraint -the number of pin count. to
reduce - number of pins of the microcontroller ICs, the
pins allotted for the parallel ports -alternate functions
also.
Out of the available four parallel ports of 8051, Port 1 is
used exclusively for input and output functions alone.


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Parallel Ports of 8051
The other port pins have -distinct function in addition to -
used for input and output functions. So,all the 24 pins of
Port 0, port 2, port 3 -two different functions based on
the commands or programs running.
All the four ports are bi-directional -programmed to have
input or output operation. All the 8 port pins -connected
through 8 D type port latches. One D type latch connects
the data in it to a port pin when the port is used as
output port.



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Parallel Ports of 8051
The user can access all the four ports using -addresses
mapped in the special function register area.
Note that it is possible to address individual bits of all
the four ports by - bit addresses. Using this bit address,
individual bits can be read in or changed.




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Parallel Ports and Port Pins of 8051
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Structure of Port 1
Port 1 -only port in 8051 -used exclusively for input and output
operation.
The output of the port latch is connected to the port pin
through a transistor driver with internal pull up resistor. The
port can be operated as an input after writing 1 to all the bits
of port 1 latch.
8051 ports are organized such that most instructions read the
data from the pin for read operation and some instructions
read the data from the latch.
So, the input buffer consists of the select logic and the related
control signals Read Latch, Read Pin for discriminating this.




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Internal structure of PORT 1
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Pins of ports 0 and 2 can be used as input port pins if
a 1 is written to the corresponding port latches by
the programmer.
For using Pins of ports 0 and 2 as output pins, a pull
up resistor may have to be connected to the
corresponding port pins.
Ports 0 and 2 have an alternate function in addition
to being used as input and output ports.

Structures of Port 0 and Port 2
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The Ports 0and 2 are used as address/ data bus when
external memory or I/O devices are accessed. Port 0 -low
order address bus and the port 2 -higher order address
bus.
The drivers of Port0 and Port2 have an internal
multiplexer to serve this purpose as shown in figures.



Structures of Port 0 and Port 2
Internal Structure of Port 0
Internal Structure of Port 2
Structure of Port 3
Port 3 is different from the other ports in the aspect that
individual port pins can be programmed for input and
output operation.
Each pin of port 3 can be programmed - for input, output
operation or alternate functions.
All the Port3 pins -serve an alternate function according
to the hardware signals and interfacing.
the alternate functions can be activated only if the port3
bits are written with 1s in their position.




Internal Structure of Port 3
Alternate functions of Port 3
Regarding the port access-two possibilities for read operation.
The read instruction for a port can either read the port latch
or the port pins.
This difference is made in the internal hardware of 8051 in
order to avoid misinterpretation of the voltage level at the
pins.
The instructions, which have the operations Read, Modify
and write to the port read the Port latches and not the pins.


Alternate Functions of Port 3
All other instructions accessing the ports read the data from the
port pins only. The example instructions that read the port latch are
ANL P1,A;
ORL P2,A;
XRL P3,A;
INC P0;
DEC P1;
JBC P1.1,DELAY;
Note that these instructions read the port, modify the contents and
then write the data back to the port. So, the port latches are read
and not the pins.



CPL P3.0;
DJNZ P3,LABEL
CLR P3.1;
SETB P1.2;
MOV P2.2,C;
External Memory Interfacing in 8051
External memory interfaced to 8051 can be of two types
-external program memory and external data memory.
The external memory accesses are accomplished with
the Ports 0 and 2 of 8051 as they serve as the
multiplexed address/ data buses. The external memory in
8051 is always accessed with 16 bit addresses.
The 8051 outputs the signal ALE (Address Latch enable)
in order to demultiplex the lower order address and data
bus.
In addition, the micro-controller sends the control signals
on the Port3 lines.
Program memory interfacing
The program memory can be placed outside the chip in
addition to the internal program memory. The complete
program memory can be placed outside the chip
neglecting the internal program memory.
Applying proper the voltage level on the input line EA of
8051 can do the selection of any of the above two
methods.
Connecting EA to Ground will disable the internal
program memory and all program memory accesses are
done to external memory. The Read strobe signal given
by the micro-controller is PSEN.
This active low signal is connected to the Read selection
line of the memory chips.


Connecting External Program
Memory to 8051
Connecting External Program
Memory to 8051
Connecting EA pin of 8051 to the logic 1 or +5V will
program the microcontroller to use the internal
program memory for the addresses starting from
0000. After the available internal memory, the
external memory is accessed.
If = 0; The internal program memory is not
accessed.
If = 1; Then internal program memory is accessed
for address 0000-0FFF (or the available range) and
external program memory is accessed for addresses
greater than 0FFF.


Connecting EPROM IC 27128 to 8051

Accessing External Data Memory
The data memory in the system - be Random Access
memory as it should facilitate both read and write
operation of data. The external data memory is
interfaced in the same way as the program memory
is interfaced.
The major difference is that the read and writes
operations can be done in Read /Write Random
Access Memory.

Accessing External Data Memory
The control signals for reading and writing to data
memory are available from the port3 pins. P3.6 pin
gives data memory write enable signal and P3.7 pin
gives out the RAM read enable signal.
A decoder logic circuit is necessary to select the RAM
chip based on the higher order address lines.


Connection External Data Memory to
8051
Connecting RAM Chip 6264 to
8051
8051 Timers
The 8051 comes -with two 16 bit timers, both of
which may be controlled, set, read, and configured
individually. The 8051 timers have three general
functions:
Programming predefined length of time, and then
issuing an interrupt request.
Counting the transitions on an external pin,
Generating baud rates for the serial port.


8051 Timers
Basically the timers are the digital counters which are
incremented at the pulses given to it. The timers can be
controlled to -function through four SFRs namely, TMOD,
TCON, TH0/TL0 and TH1/TL1.
The timers will have overflow when it counts to full value
and resets to 0 upon next count.
The overflow in the timers will set the two bits in the
TCON SFR. This overflow can be programmed to interrupt
the microcontroller execution and execute a predefined
subroutine


8051 Timers
If the timer registers are incremented by the internal
clock pulses from the microcontroller, then the operation
is termed as Timing operation.
Meanwhile if the timer registers get their clock pulses
from an external device through the port 3 pins of 8051,
then the operation is termed as Counting.
Timer 0 external input pin P3.4 (T0) is used give clock
input to timer 0 to act as counter.
Timer 1 external input pin P3.5 (T1) is used give clock
input to timer 1.


Timer SFRS
The 8051 has two timers and each of them will have
similar operations and functions. The timer in 8051 is
basically a 16-bit register which can be incremented
depending upon the clock pulses applied to it.
These timer registers are configured as the Special
Function Registers.

Timer SFRS
These SFRs at any time has the timer/counter register
content. So, the timers can be stopped at any time and the
contents can be read from these registers .Since there are
only two bytes devoted to the value of each timer it is
apparent that the maximum value a timer may have is
65,535.
If a timer contains the value 65,535 and is subsequently
incremented, it will reset to 0 with an indication of overflow.
One timer is TIMER0 and the other is TIMER1. Each timer
also has two 8 bit SFRs namely TH0 and TL0 forming the
higher and lower order bytes of Timer0 and TH1 and TL1
forming the higher and lower bytes of Timer1.
Timer SFRS
These SFRs at any time has the timer/counter register
content. So, the timers can be stopped at any time and the
contents can be read from these registers .Since there are
only two bytes devoted to the value of each timer it is
apparent that the maximum value a timer may have is
65,535.
If a timer contains the value 65,535 and is subsequently
incremented, it will reset to 0 with an indication of overflow.
One timer is TIMER0 and the other is TIMER1. Each timer
also has two 8 bit SFRs namely TH0 and TL0 forming the
higher and lower order bytes of Timer0 and TH1 and TL1
forming the higher and lower bytes of Timer1.
TMOD SFR
The TMOD SFR -used to control the mode of operation of
both timers. Each bit of the SFR gives the micro controller
specific information -how to run a timer. The higher order
four bits (bits 4 through 7) relate to Timer 1 whereas the
low four bits (bits 0 through 3) perform the same
functions for timer 0.


BIT Patterns for TMOD (89h) SFR
TCON SFR
SFR that controls the two timers and provides
valuable information about them is TCON.


BIT Patterns for TCON (88h) SFR
Bit Name Bit Address Explanation of Function Timer
7 TF1 8Fh Timer 1 Overflow. The micro
controller sets this bit when Timer
1 overflows.
1
6 TR1 8Eh Timer 1 Run. When this bit is set
Timer 1 is turned on. When this bit
is cleared Timer 1 is off.
1
5 TF0 8Dh Timer 0 Overflow. The micro
controller sets this bit when Timer
0 overflows.
0
4 TR0 8Ch Timer 0 Run. When this bit is set
Timer 0 is turned on. When this bit
is cleared Timer 0 is off.
0

TCON SFR
Only 4 of the 8 bits of the TCON SFR is defined. the other 4
bits of the SFR dont have anything to do with timers. They
are related with Interrupts and they will be discussed in
the chapter that addresses interrupts.
Note that the individual bits of TCON register can be
addressed separately by their bit addresses. This allows
the programmer to run the timers using bit addressable
instructions and check the overflow independently.



Timer Operating Modes
The two 16 bit timers of 8051 can be operated in any
one of the four modes. The mode selection can be
done by the setting the proper bits in the TMOD SFR.


Operating Modes of 8051

Mode 0 - 13-bit Timer Mode
Timer mode "0" is a 13-bit timer. Out of 16 bits of Timers,
only 13bits are used. The 5 bits of lower order byte is used
and 8 bits of the higher order byte of the timers are used
in Mode0. Lower order byte TL0/1 will count from 0 to 31.
When TL0/1 is incremented from 31, it will "reset" to 0
and increment TH0/1. So, the timer can only contain 8192
values from 0 to 8192.
The timer can be operated as timer with internal clock
pulses or as a counter with external clock pulses.
This selection is done by D2 bits of TMOD for Timer 0 and
D6 bit of TMOD for Timer1




TCON SFR
The clock pulses selected by D2 and D6 bits of TMOD
is then controlled by programmer setting and
connected to the Timer registers. The control is by
three different means.

First is the Timer Run control bits D4 and D6 of TCON
register. The timer will run only when Timer run
control bits are set to 1.



TCON SFR
The other controls for the timers are through the
GATE control bits D4 and D7 of TMOD and the
External inputs for timer. Setting GATE to 1 allows the
timer to count only if the external control input INT0
or INT1 is set to 1. Setting Gate to 0 will disable the
corresponding external timer control inputs INT0 and
INT1.
Setting Timer to mode 0 will overflow back to zero
after 8192 counts. This will set the TF1 and TF0 bits
for timer 1 and timer 0 respectively.



Mode 0 Operation of Timer 1 of
8051

Mode 1 16-bit Timer Mode
In timer Mode 1 of 8051, each timer is operated as a
16-bit timer. It functions just like mode 0 except that
all 16 bits are used.
TL0/1 bits are incremented from 0 to 255. When
TL0/1 is incremented from 255, it resets to 0 and
causes TH0/1 to be incremented by 1. Since this is a
full 16-bit timer, the timer may contain -65536 distinct
values.
The control of gating and running the timer in mode 1
is similar to that of mode 0



Mode 1 Operation of Timer 1 of
8051

Mode 2 8-bit Timer Auto
Reload Mode
Only 4 of the 8 bits of the TCON SFR is defined. the other 4
bits of the SFR dont have anything to do with timers. They
are related with Interrupts and they will be discussed in
the chapter that addresses interrupts.
Note that the individual bits of TCON register can be
addressed separately by their bit addresses. This allows
the programmer to run the timers using bit addressable
instructions and check the overflow independently.



Mode 2 8-bit Timer Auto
Reload Mode
For example, lets say TH0 holds the value FDh and
TL0 holds the value FEh. Then at the next counting
pulse, TL0 will be incremented to FFh. Then for the
next pulse, the TL0 will overflow and should have
become 00.
But, as it is reload mode, the TL0 will be loaded with
TH0 i.e., FDh. The value of TH0 will never be changed.
TH0/1 is set to a known value and TL0/1 is the SFR
that is constantly incremented.


Mode 2 8-bit Timer Auto
Reload Mode
The auto-reload mode is very commonly used for
establishing a baud rate for Serial Communications.
The control of gating and running the timer in mode 2
is similar to that of mode 0



Mode 2 Operating of Timer 1 of
8051

Mode 3 Split Timer Mode
Mode "3" of 8051 timer is a split-timer mode and is
applicable only for Timer 0. When Timer 0 is placed in
mode 3, it essentially becomes two separate 8-bit
timers. That is, Timer 0 is TL0 and Timer 1 is TH0.
Both timers count from 0 to 255 and overflow back to
0.
In mode 3, all the bits that are related to Real Timer 1
will simply hold its count and will not run and the
situation is similar to keeping TR1=0.




Mode 3 Split Timer Mode
In Split Timer mode of Timer 0, the real Timer 1 (i.e.
TH1 and TL1) can not be started or stopped since the
bits that do that are now linked to TH0. The real timer
1, in this case, will be incremented every machine
cycle no matter what.
When two separate timers in addition to a baud rate
generator is required in an application, then real
Timer 1 can be used as a baud rate generator and
TH0/TL0 can be used as two separate timers in mode
3.



Mode 3 Operation of Timer 0 of
8051

Timer Control and Operation
For timer operation (C/T = 0 in TMOD), the timer
register counts the divided-down clock. The timer
register is incremented once every (FOSC / 12) in
standard mode. If the clock frequency is
11,059,000KHz, then the counter will be incremented
at the rate of (11,059,000KHz/12) = 921,583 KHz.
This means the counter will be incremented 921,583
times in a second. Thus to have delay of say 0.1
seconds, then the counter must be initialized to the
count value of (0.1*921,583) = 92158.



Timer Control and Operation
Following steps are the program steps to initialize and use a
timer in 8051
Decide what mode the timer to be in.
Initialize the TMOD SFR.
Write the timer value to Timer register
Start the timer running by setting the TR0/1 bit in TCON
register
Check for TF0/1 bit or program to handle timer overflow
as interrupt and execute interrupt subroutine.



Steps in Timer Control
Write TMOD
Write TCON
Write timer register
Start timer
Program Required Operation
Continue

Timer Control and Operation
To set the bit TR1 of TCON (D6 bit), any one of the
following two commands can be used -MOV TCON,
#40h OR SETB TR1

As, TR1 is a bit addressable location, SETB instruction
is used and this has the benefit of setting the TR1 bit
of TCON without changing the value of any of the
other bits of the SFR.




Reading Value of 16-bit Timer
There are two common ways of reading the value of a
16-bit timer;
1. Read the actual value of the timer as a 16-bit
number from TH0/TL0 or TH1/TL1
2. Detect when the timer has overflowed from the
TF0/1 bits of TCON. If TF0 is set, it means that
timer 0 has overflowed; if TF1 is set, it means that
timer 1 has overflowed. This overflow can act as
an interrupt and can directly run an Interrupt
service routine, if enabled properly.



Using Timers and Counters
Timers in 8051 can be programmed to count pulses
from external devices. For example, a sensor placed
along a conveyor belt can give one pulse for every
object moving on the conveyor.
This pulse can be counted by the 8051 timer in
counter mode. The pulses from the sensor can be
given as an external input to a timer and programmed
to count.



Using Timers and Counters
The timer can be programmed to give an interrupt after a
predefined count value. For example, after counting 12
objects in the conveyor or after counting 12 pulses in the
timer, an interrupt may be given to the 8051 system to
give signal to some other action like packing the 12 items
It is important to note that the 8051 checks the P3.4 line
each instruction cycle (12 clock cycles). This means that if
P3.4 is low, goes high, and goes back low in 6 clock cycles
it will not be detected by the 8051.
This also means the 8051 event counter is only capable of
counting events that occur at a maximum of 1/24th the
rate of the crystal frequency.



Using Timers and Counters
That is to say, if the crystal frequency is 12 MHz, it can
count a maximum of 500,000 events per second
(12.000 MHz * 1/24 = 500,000).
If the event being counted occurs more than 500,000
times per second, it will not be able accurately
counted by the 8051.



Interrupt Sources and Interrupt
Vector Addresses
8051 basically has following five interrupt sources so
that any of the following events will make 8051 to
execute an interrupt service routine.
Timer 0 Overflow.
Timer 1 Overflow.
Reception/Transmission of Serial Character.
External hardware interrupt 0.
External hardware interrupt 1.



Interrupt Sources and Interrupt
Vector Addresses
Different interrupt sources have to be distinguished
and 8051 must execute different subroutines
depending interrupt triggered. This is accomplished
by jumping or calling to a fixed address when
interrupt occurs.
These addresses are called interrupt vector addresses
or interrupt handler addresses.



Interrupt Sources and Interrupt
Vector Addresses
Interrupt Flag Interrupt Vector Address
External 0 IE0 0003h
Timer 0 TF0 000Bh
External 1 IE1 0013h
Timer 1 TF1 001Bh
Serial RI/TI 0023h

Interrupt Sources and Interrupt
Vector Addresses
Whenever Timer 0 overflows (i.e., the TF0 bit is set),
the main program will be temporarily suspended and
control will jump to 000BH.
It is assumed that service routine at address 0003H
handles the situation of Timer 0 overflowing.



Enabling and Disabling
Interrupts
By default at power up, all interrupts are disabled. This
means that even if, for example, the TF0 bit is set, the
8051 will not execute the interrupt. Programming must be
done specifically to enable interrupts.
Interrupt Enable Special Function Register IE SFR at the
address A8h is used to enable and disable interrupts by
modifying its bits
The interrupts enabling can be handled individually by -
bit addresses for the individual bits of IE register.



Bit Patterns for the IE SFR (A8H)
Bit
position
D7 D6 D5 D4 D3 D2 D1 D0
Bit
Address
AF AC AB AA A9 A8
Name EA - - ES ET1 EX1 ET0 EX0
Explana
tion
Global
Interrupt
Enable/
Disable
Undefi
ned
Undefin
ed
Enable
Serial
Interrupt
Enable
Timer 1
Interrupt
Enable
External 1
Interrupt
Enable
Timer 0
Interrupt
Enable
External 0
Interrupt

Bit Patterns for the IE SFR (A8H)
Each of the 8051s interrupts has its own bit in the IE
SFR. A particular interrupt can be enabled by -
corresponding bit. For example, to enable Timer 1
Interrupt, the one of the following instructions can be
executed.

MOV IE, #08h OR SETB ET1



Bit Patterns for the IE SFR (A8H)
However, before Timer 1 Interrupt (or any other
interrupt) is truly enabled, bit 7 of IE SFR must also be
set. Bit 7, the Global Interrupt Enable/Disable, enables
or disables all interrupts simultaneously.
That is, if bit 7 is cleared then no interrupts will occur,
even if all the other bits of IE are set. Setting bit 7 will
enable all the interrupts -selected by setting other bits
in IE.



Interrupt Priorities and Polling
Sequence
The 8051 automatically evaluates whether an
interrupt occurs after every instruction. When
checking for interrupt conditions, it checks them in
the following order:
External 0 Interrupt
Timer 0 Interrupt
External 1 Interrupt
Timer 1 Interrupt
Serial Interrupt


Interrupt Priorities and Polling
Sequence
The above list -gives the interrupt priority.
So, whenever the External 0 interrupt and Timer 1
interrupt occurs at the same instant, then 8051
microcontroller executes the interrupt service routine
corresponding to External 0 interrupt first.
Then 8051 microcontroller will return to the main
program, execute one instruction and then execute
the interrupt service routine corresponding to Timer 1
Interrupt.


Interrupt Priorities and Polling
Sequence
If a Serial Interrupt occurs at the exact same instant that an External 0
Interrupt occurs, the External 0 Interrupt will be executed first and the
Serial Interrupt will be executed once the External 0 Interrupt has
completed.
The 8051 offers two levels of interrupt priority: high and low. By using
interrupt priorities, the above interrupts can be divided into two
separate interrupt priorities. So, the five interrupts can be again
prioritized.
Interrupt priorities are controlled by the IP SFR (B8h). For example, if
the Serial Interrupt is much more important than the Timer 0 interrupt,
then the Interrupt Priority register IP SFR at the address B8h can be
properly programmed to set the priority.



Interrupt Priorities and Polling
Sequence
This is done by assigning a high priority to the Serial
Interrupt and a low priority to the Timer 0 Interrupt. By
setting the D4 bit to 1, the serial interrupt will be set to
higher priority and making D1 bit to 0, the Timer 0 interrupt
will be set to lower priority.
Note that the priority can be set individually by using the bit
addresses of the IP register. For example, the timer 0
interrupt priority can be made high by setting the D1 bit of
IP SFR. So, the following instructions can be used for the
same.
SETB PT0 (or) SETB B9H (or) MOV IP, #82H




Bit Patterns for the IP SFR
Bit position D7 D6 D5 D4 D3 D2 D1 D0
Bit Address
BC BB BA B9 B8
Name EA - - PS PT1 PX1 PT0 PX0
Explanation
Enable
Interrupts
-
Made 0 to
disable all
interrupts
Undef
ined
Undefin
ed
Serial
Interrupt
Priority
Timer 1
Interrupt
Priority
External 1
Interrupt
Priority
Timer 0
Interrupt
Priority
External 0
Interrupt
Priority

Interrupt Priorities and Polling
Sequence
When considering interrupt priorities, the following rules apply:
Nothing can interrupt a high-priority interrupt--not even
another high priority interrupt.
A high-priority interrupt may interrupt a low-priority interrupt.
A low-priority interrupt may only occur if no other interrupt is
already executing.
If two interrupts occur at the same time, the interrupt with
higher priority will execute first. If both interrupts are of the
same priority the interrupt which is serviced first by polling
sequence will be executed first.


Interrupt Priorities and Polling
Sequence
The complete structure of the 8051 interrupts can be well
understood -figure 11.16. The five interrupt sources are
passed first - IE register, which decides the enabling and
disabling of interrupts. The global interrupt enable -shown
-figure.
The IP register - set two priority levels among the available
interrupts. This is shown in the figure as high priority and
low priority blocks. The bits IT0 and IT1 can be set by
TCON special function register and this is used to select
whether the hardware interrupt is level triggered or edge
triggered.



Structure of 8051 Interrupts
IE1 IT1
1
0
IE0 IT0
1
0
TF0
TF1
RI
TI
Interrupt
enables
Global
Enable
Interrupt
enabled
High
priority
interrupt
Low
priority
interrupt
Interrupt
polling
sequence
IP
register
IE
register
INT1
INT0

Timing of Interrupts
8051 micro-controller samples the hardware signal level on its pins
once in every machine cycle. A machine cycle is the time taken by
the controller to access one memory location or I/O device.
As 8051 takes 12 clock cycles to complete one machine cycle, the
interrupt signal applied at the pins of 8051 must be available for at
least 12 clock periods.
External interrupts are applied at the pins INT0 and INT1. The
sensing of voltage level applied to this pin can also programmed in
8051. The interrupts can be either level triggered or edge triggered
as set by the IT0 and IT1 bits of the SFR TCON
A 0 on these bit positions will make both the hardware interrupts to
be level triggered. Level triggered means a low level voltage on the
interrupt pins will activate the interrupts.

Bit Patterns for the TCON SFR
Bit position D7 D6 D5 D4 D3 D2 D1 D0
Bit Address 8F 8E 8D 8C 8B 8A 89 88
Name TF1 TR1 TF0 TR0 IE1 IT1 IE0 IT0
Explanation
Timer 1
Overflow
flag
Timer 1
run
control
bit. Set to
1 by
software
to run.
Timer
0
Overflo
w flag
Timer 0
run
control
bit. Set
to 1 by
softwar
e to
run.
Extern
al
Interru
pt 1
edge
detect
bit
Interrupt 1
type control.
Set to 1 by
software for
edge
triggering
and cleared
for level
triggering
External
Interrupt
0 edge
detect
bit
Interrupt 0
type
control. Set
to 1 by
software
for edge
triggering
and
cleared for
level
triggering
Bit Address
8F 8E 8D 8C 8B 8A 89 88

Interrupt Priorities and Polling
Sequence
A 1 on the IT0 and IT1 bits of the SFR TCON will program
the hardware interrupts as edge triggered. Edge triggering
means the change of voltage from high state to low state
will activate the interrupt.
When an interrupt is triggered, the micro controller takes
the following actions automatically:
The current Program Counter is saved on the stack, low-
byte first.
Interrupts of the same and lower priority are blocked.
In the case of Timer and External interrupts, the
corresponding interrupt flag is cleared.



Interrupt Priorities and Polling
Sequence
Program execution transfers to the corresponding
interrupt handler vector address.
The Interrupt Handler Routine executes.
An interrupt ends when your program executes the RETI
(Return from Interrupt) instruction. When the RETI
instruction is executed the micro controller takes the
following actions:
Two bytes are popped off the stack into the Program
Counter to restore normal program execution.
Interrupt status is restored to its pre-interrupt status.

Interrupt Priorities and Polling
Sequence
The internal architecture of 8051 is such that the external
hardware interrupts will be cleared automatically when the
interrupt service routine is executed only if is programmed to
be edge or transition triggered.
If the interrupts are level triggered, then the programmer
will have to reset the interrupt enable corresponding to this
interrupt using IP SFR
If the interrupt being handled is a Timer or External interrupt,
the micro controller automatically clears the interrupt flag
before passing control to interrupt handler routine. This
means it is not necessary to clear the bit in the program.


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8051 Serial Ports
One of the 8051s many powerful features is its integrated
Universal Asynchronous Receiver Transmitter (UART),
otherwise known as a serial port. With integrated serial port of
8051, data can be transmitted and received easily by reading
and writing the data to the serial port registers. The features of
the 8051 serial ports are
Full duplex operation.
Receive Buffered.
Access using single double buffered Register SBUF.
Four different modes of operation.
Option to use fixed baud rate or programmable baud rate.

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8051 Serial Ports
Full Duplex serial port means that it can transmit and
receive data simultaneously. It is also receive-buffered,
meaning it can commence reception of a second byte
before a previously received byte has been read from the
SBUF register.
However, if the first byte still hasnt been read by the time
reception of the second byte is complete, one of the bytes
will be lost. The serial port receive and transmit registers
are both accessed at Special Function Register SBUF.
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8051 Serial Ports
Data to be transmitted are written to the register SBUF
and the data received by the serial port are read from
the register SBUF. Physically reading and writing SBUF
actually accesses two separate registers.
This technique of having same address for two different
registers is called double buffering.
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SERIAL PORT CONTROL SFRS
The serial port of 8051 is controlled by two registers in
SFR area of 8051 as shown in Table
The two registers are Serial Port control registers; SCON
and serial port buffer register SBUF.
SFR Name Description SFR Address
SCON
Serial port control
register
98h
SBUF
Serial port buffer
register
99h
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SERIAL PORT CONTROL SFRS
In addition to the above two registers, the MSB of PCON
register named as SMOD bit is used to double the baud
rate of serial transmission and reception.
If SMOD bit is set to 1, then the baud rate is doubled.
The individual bits of SCON have the functions as shown
in Table . As the SCON register has many individual status
bits, the individual bits of this register are bit addressable.
The bit address is also given in Table .
The programmer can use these bit addresses to check the
status of the serial port and set the mode individually.
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Bit patterns for SCON (98h) SFR
Bit Name Bit Address Explanation of Function
D7 SM0 9Fh
Serial port mode select bits
D6 SM1 9Eh
D5 SM2 9Dh Multiprocessor Communications Enable bit
D4 REN 9Ch
Receiver Enable. This bit must be set in order to receive
characters.
D3 TB8 9Bh Transmit bit 8. The 9th bit to transmit in mode 2 and 3.
D2 RB8 9Ah Receive bit 8. The 9th bit received in mode 2 and 3.
D1 TI 99h
Transmit Interrupt Flag. Set when a byte has been
completely transmitted.
D0 RI 98h
Receive Interrupt Flag. Set when a byte has been completely
received.
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Bit Pattern - Description
D7 and D6 bits of the SCON register define the operation
modes of the serial port and the basic operating modes
are given in Table.
The SM0 and SM1 bits can select any one of the four
operating modes described in the next section.

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Definition of Bits SM0 and SM1 in
SCON SFR
Bit Pattern - Description
The next bit, SM2, is a flag used for enabling
"Multiprocessor communication" in modes 2 and 3. If SM2
is set to 1 in modes 2 and 3, the Receive Interrupt RI flag
will not be activated if the received 9th data bit is 0. If SM2
is set in Mode1, then Receive Interrupt RI flag will not be
activated if valid stop bit is not received.
This can be useful in certain advanced serial applications. It
can be now assumed that SM2 bit has to be cleared so that
RI flag will be set when any character is received.

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Bit Pattern - Description
The next bit, REN, is "Receiver Enable." This bit is set in
order to receive the characters from the receive data line
of the serial port.
The TB8 bit is used in modes 2 and 3. In modes 2 and 3, a
total of nine data bits are transmitted. The first 8 bits are
the 8 bits of the data to be transmitted, and the ninth bit
is taken from TB8. The RB8 also operates in modes 2 and
3 on the reception side.
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Bit Pattern - Description
When a byte is received in modes 2 or 3, a total of nine
bits are received. In this case, the first eight bits received
are the data of the serial byte received and the value of
the ninth bit received will be placed in RB8.
TI means "Transmit Interrupt." When a program writes a
data to the serial port buffer SBUF, then the serial port
will start shifting this data in the serial transmit line bit
by bit at the predefined clock speed or baud rate. 8051
will give TI signal to the programmer after sending the
data completely.
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Bit Pattern - Description
Upon sensing the TI bit set to 1, the programmer can
then write the next data for transmission. When the TI
bit is set, the programmer may assume that the serial
port is "free" and ready to send the next byte.
Finally, the RI bit means "Receive Interrupt." Whenever a
data is received on the receive data line of the serial
port, this serial data will be shifted in to a buffer and
then stored in the SBUF register.
Setting of RI bit indicates that a byte has been received.
Upon sensing the RI bit set to 1, the programmer may
read the data from the SBUF.

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OPERATING MODES
Bits SM0 and SM1 are used to set the serial mode to a
value between 0 and 3.
Selecting the Serial Mode selects the mode of operation
(8-bit/9-bit, UART or Shift Register) and also determines
how the baud rate will be calculated.
In modes 0 and 2 the baud rate is fixed based on the
oscillators frequency. In modes 1 and 3 the baud rate is
variable based on Timer 1 overflows.
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Block Diagram of the serial port of
8051
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SBUF
SBUF is physically two registers with the same address.
When data to be transmitted is written to the SBUF
register, then it will be shifted bit by bit into the TXD line
of 8051. The port 3 pin 3.1 acts as the TXD line. The
shifting is done by the transmit clock which determines
the baud rate.
Similarly, when the data bits are received on the RXD line
(Pin 3.0 of port 3), the bits are shifted serially into the shift
register according to the Receive clock.
After the reception is complete, the data received will be
placed on SBUF from where it can be read by the
programmer through the internal bus.
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Reception / Transmission
Mode 0: In this mode serial data is entering and exiting
through RxD pin. So, in mode 0, Full duplex is not possible
meaning that both transmission and reception cannot take
place simultaneously. TxD pin outputs the shift clock. 8 bits
are transmitted/received (LSB first). The baud rate is fixed at
1/12 the oscillator frequency. Transmission is started by
writing a data byte to the SBUF register and once the
transmission is complete, TI flag is set
The reception is started by enabling REN in SCON register.
Once the data reception is complete, the RI flag is set
The baud rate in Mode 0 is fixed at one twelfth of the clock
frequency. Baud rate= (Clock frequency/12)

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Signal Transmission / Reception
pattern
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Reception / Transmission
Mode 1: In this mode, 10 bits are transmitted through
TxD and simultaneously 10 bits can be received through
RxD. The 10 bits are made up of a start bit (0), 8 data bits
(LSB first), and a stop bit (1). On completion of reception,
the stop bit goes into RB8 in Special Function Register
SCON. The baud rate is variable and is set by the Timer 1
overflow rate. The baud rate for mode 1 is fixed at the
following rate.

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Reception / Transmission
Baud rate= (Timer 1 overflow rate /16) if SMOD bit in
PCON SFR is set to 1.
Baud rate= (Timer 1 overflow rate /32) if SMOD bit in
PCON SFR is set to 0.
Note that PCON is a special Function Register described
in chapter 25. The MSB of PCON register can be set or
reset by the programmer. The baud rate can be doubled
by setting the MSB of PCON.
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Reception / Transmission
In order to generate the baud rate clock from timer 1,
Timer 1 can be configured to act as timer in auto reload
mode with the timer 1 interrupt disabled.
As in mode 0, the transmission is initiated by writing a
data to SBUF register. Reception is initiated by a 1 to 0
transition that is the start bit received and also when
REN of SCON SFR is 1.

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Reception / Transmission
Mode 2: In this mode, 11 bits are transmitted through TxD or
received through RxD. The 11 bits are made up of one start bit
(always 0), 8 data bits (LSB first), a programmable 9th data bit, and a
stop bit (always 1). The 9th data bit transmitted is same as TB8 bit in
SCON special function register. It can be assigned the value of 0 or 1
by the programmer. Or, for example, the parity bit (P, in the PSW)
could be moved into TB8.
On reception, the 9th data bit goes into RB8 in Special Function
Register SCON, while the stop bit is ignored. The baud rate is
programmable to either 1/32 or 1/64 of the oscillator clock
frequency.
Baud rate= (Clock frequency /32) if SMOD bit in PCON SFR is set to 1.
Baud rate= (Clock frequency /64) if SMOD bit in PCON SFR is set to 0.


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Reception / Transmission
Mode 3: In this mode, 11 bits are transmitted through TxD
and simultaneously 11 bits are received through RxD. The
11bits are made up of a start bit (0), 8 data bits (LSB first), a
programmable 9th data bit, and a stop bit (1). In fact, Mode
3 is the same as Mode 2 in all respects except baud rate. The
baud rate in Mode 3 is variable.
The baud rate for mode 3 is fixed at the following rate similar
to mode1.
Baud rate= (Timer 1 overflow rate /16) if SMOD bit in PCON
SFR is set to 1.
Baud rate= (Timer 1 overflow rate /32) if SMOD bit in PCON
SFR is set to 0.

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Reception / Transmission
In all four modes, transmission is initiated by any
instruction that uses SBUF as a destination register.
Reception is initiated in Mode 0 by the condition RI =
0 and REN = 1. Reception is initiated in the other
modes by the incoming start bit when REN = 1.
The flow chart 11.20 shows the steps in
programming the serial port of 8051. These steps
are detailed in the following sections and also in the
example programs.

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Programming the Serial Port
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Initializing Serial Port
Once the Serial Port Mode has been selected, then the
programmer must configure the serial ports baud rate.
Only serial port modes 1 and 3, the baud rates are
programmable.
The Baud Rate is determined based on the oscillators
frequency when in mode 0 and 2. In mode 0, the baud
rate is always the oscillator frequency divided by 12. This
means if the crystal is 11.059 MHz, mode 0 baud rate will
always be 921,583 baud.
In mode 2 the baud rate is always the oscillator
frequency divided by 64, so an 11.059 MHz crystal speed
will yield a baud rate of 172,797.
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Initializing Serial Port
In modes 1 and 3, the baud rate is determined by how frequently timer
1 overflows. The most common method is to put timer 1 in 8-bit auto-
reload mode (timer mode 2) and set a reload value (TH1) that causes
Timer 1 to overflow at a frequency appropriate to generate a baud rate.
To determine the value that must be placed in TH1 to generate a given
baud rate, the following equation is used.
TH1 = 256 - ((Clock frequency / 384) / Baud) if SMOD in PCON SFR is 0.
TH1 = 256 - ((Clock frequency / 192) / Baud) if SMOD in PCON SFR is 1.
The following table gives the commonly used baud rates and the
corresponding reload for the timer in mode 2 assuming the clock
frequency of 11.059 MHz and SMOD is reset.

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Commonly used baud rates
Baud Rate Timer value TH1
300 A0h
1200 D0h
2400 FAh
9600 FDh
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Baud Rate
Following set of instructions will set the timer for the baud
rate of 9600.
MOV TMOD, #00100000B ;timer/counter 1 set for mode 2,
8-bit TIMER
;operation
MOV TH1, #0FDh ; timer/counter 1 is
timed for 9600 baud
SETB TR1 ; timer/counter 1 is
enabled for free run
For initializing the serial port for mode 3 operation, the
following instruction can be used.
MOV SCON, #11010000B

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Transmitting and Receiving Data
Using Serial Port
Once the Serial Port has been properly configured as explained
above, the serial port is ready to be used to send data and
receive data.
To write a byte to the serial port one must simply write the value
to be transmitted to the SBUF (99h) SFR. For example, to send
the letter "A" to the serial port, the following instruction can be
written.
MOV SBUF, #A
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Upon execution of the above instruction the 8051 will begin
transmitting the character via the serial port. Once the
transmission is complete, the serial port transmit interrupt
flag TI is set. Since the 8051 does not have a serial output
buffer, a character can not be written to SBUF before the
previous written character is completely transmitted. This
can be accomplished by checking the TI flag.
Reading data received by the serial port is equally easy. To
read a byte from the serial port one just needs to read the
value stored in the SBUF (99h) SFR after the 8051 has
automatically set the RI flag in SCON.
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Transmitting and Receiving Data
Using Serial Port