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OUTLINE
19 -3
N+ substrate N = 10 cm 250
D
microns
Cathode
anode i
1
i
R on
BV BD
v
≈1V v
cathode
Φ
c
• W( V) = Wo 1 +V/ Φc
Φc + V
2εΦc(N a+N d )
• Wo=
qN aN d 4 Φc
• ( Em a x ) 2 = ( EBD) 2 = BV BD
W o2
2 Φc
• Em a x = 1 + V /Φ c
W o
• Solve for W (BV BD ) and BV BD
• Pow er diode at reverse breakdow n:
N a >> N d ;E = EBD ;V = BV BD >> Φc to obtain (put in Si values)
ε EBD 2 1.3x10 17
W o 2 BV BD 2εΦ c
BV BD = = ;[V ]
• W 2 (BV BD ) = ;W o
2 = 2 q N d Nd
Φc q N d
2 BV BD
W (BV BD ) = = 10 -5 BV BD ;[µ m ]
EBD
• Co nc l u s i o n s
1 . La r g e BV BD ( 1 0 3 V) r e q ui r e s Nd < 1 0 1 5 c m - 3
2 . La r g e BV BD ( 1 0 3 V) r e q ui r e s N- d r i f t r e g i o n > 1 0 0 µ m
- V + • V1 + V2 = BVBD
P+ N- N
+ • E1 + E2 = EBD
W q Nd Wd 2
d
Electric
• BVBD = EBD Wd -
2ε
E + E2 field
1
V
1 ε(EBD)2
E
2 • If N d << (required
V2 2q(BV BD )
x value of N d for non-punch-thru
diode),then
q Nd Wd qN dW d2
• E1 = ;V 1 = • BV BD ≈ EBD W d and
ε 2ε
• W d(Punch-thru)
• V 2 = E2 W d ≈ 0.5 W d(non-punch-thru)
N
+ N+
SiO
2
N-
N-
P+ P+
bonding pad bonding pad
high field
region
QF q A W d n a
• IF = = ; Current needed
τ τ
to maintain stored charge
F. Q
W
d
q [µn + µ p] na A V d x
• IF = ;
Wd
Ohm’ s ( Law
= (J σE)
=
+ + -
P N - N+
W d2
IF
• Vd = ; Equate above + V - + V -
[µn + µ p] τ j d
Cross-sectional
two equations and solve for
d V
area = A
• Conclus
ion: long lifetime
τ minimizesd.V
µo
• µn + µp = ; n b ≈ 1 0 1 7 c m-3 . i
na
1 +
nb
• Mo b ilit y re d uc t io n d ue t o inc re a s e d 1
c a rrie r-c a rrie r s c a t t e ring a t la rg e n a . R on
v
q n a A Vd µo ≈1V
• IF = ; Ohms La w
Wd na
1 + If Wd
nb
• Vd =
wit h d e ns it y -d e p e nd e nt mo b ilit y . q µo n b A
• V d = IF Ro n
• Inv e rt Ohm’s La w e q ua t io n t o find Vd a s
func t io n IF a s s uming n a > > n b .
• V = Vj + Vd
Copyright © by John Wiley & Sons 2003 Diodes - 10
Diode Switching Waveforms in Power Circuits
Qrr = I t / 2
rr rr
di / dt d i / dt
F I F R 0 .2 5 Irr
I
rr
t
3
t
4
t
5 diF diR
• dt and dt determined
V
FP
Von t
rr by external circuit.
t • Inductances or power
t V
V
R semiconductor devices.
2 rr
t
t 5
1 S =
t
4
t interval
2
+ - +
P - + N- N+
i (t) - +
F
V ≈ 1.0 V
j
time
• Injection of excess
time
time carriers into drift
region greatly
reduces Rd.
x
Vj ≈ 1.0 V • R d inc r e a s e s a s e x c e s s
Rd
c a r r ie r s a r e r e m o v e d v ia
C L
sc r e c o m b ina t io n a nd c a r r ie r
s we e p - o ut ( ne g a t iv e c ur r e nt ) .
time
time time d iR
• V r = Ir r R d + L
dt
t s i nt e r v a l
• Ins uf f ic i e nt e x c e s s c a r r i e r s r e m a i n t o s up p o r t Ir r , s o
P + N- junc t io n b e c o m e s r e v e r s e - b ia s e d a nd c ur r e nt
de cr e as e s t o ze r o.
• Vo l t a g e d r o p s f r o m V r r t o V R a s c ur r e nt d e c r e a s e s
t o z e r o . Ne g a t i v e c ur r e nt int e g r a t e d o v e r i t s t im e
d ur a t io n r e m o v e s a t o t a l c ha r g e Qr r .
d iR d iR t rr • If s t o re d c ha rg e re mo v e d mo s t ly
• Irr = t = ; De fine d o n b y s we e p -o ut Qrr ≈ QF ≈ IF τ
dt 4 d t ( S + 1 )
s wit c hing wa v e fo rm d ia g ra m
3. Turn-o ff t ime s s ho rt e ne d
• Substituting τfor
inrr Iand rrt equations gives
d iR
IF b y la rg e b ut Irr is
dt
• trr = 2.810x10-6 BV BD
(di R/)dt) inc re a s e d .
di R
• Irr = 2.810x10-6 BV BD IF
dt
• V( o n) = 0 .3 - 0 .5 v o lt s .
P P
• Bre a kd o wn v o lt a g e s guard
≤ 1 0 0 -2 0 0 v o lt s . ring
depletion layer depletion layer
boundary with N boundary
• Ma jo rit y c a rrie r d e v ic e - no guard rings without guard
s t o re d c ha rg e . rings
• Fa s t s wit c hing b e c a us e o f la c k
o f s t o re d c ha rg e . N+
aluminum
cathode
contact -
ohmic
Copyright © by John Wiley & Sons 2003 Diodes - 16
Physics of Schottky Diode Operation
• Bre a kd o wn v o lt a g e limit e d t o
1 0 0 -2 0 0 v o lt s . anode
• Na rro w d e p le t io n re g io n
wid t hs b e c a us e o f he a v ie r
d rift re g io n d o p ing ne e d e d fo r
P P
lo w o n-s t a t e lo s s e s .
• De p le t io n la y e r fo rms rig ht a t
s ilic o n s urfa c e whe re cathode
ma ximum fie ld ne e d e d fo r
b re a kd o wn is le s s b e c a us e o f
imp e rfe c t io ns , c o nt a mina nt s .
E
• Co nt a c t p o t e nt ia l a nd re c t ify ing Si
junc t io n c o mp le t e ly ma s ke d b y Accumulation layer
i(t)
e nha nc e d c o nd uc t iv it y . So -c a lle d P-Si or
-
Al
o hmic c o nt a c t . - N+-Si
• In N+ Si d e p le t io n la y e r is v e ry Diffusing
na rro w a nd e le c t ric fie ld s a p p ro a c h electrons
imp a c t io niz a t io n v a lue s . Sma ll
v o lt a g e s mo v e e le c t ro ns a c ro s s
b a rrie r e a s ily b e c a s ue q ua nt um
me c ha nic a l t unne ling o c c urs .
• Ma ximum p ra c t ic a l v a lue o f n a = 1 0 1 7
• La rg e BVBD (1 0 0 0 V) re q uire s Nd
c m -3 a nd c o rre s p o nd ing t o
µn + µp = 9 0 0 c m 2 / ( V-s e c )
= 1 0 1 4 c m -3 whe re µn + µp =
1 5 0 0 c m 2 / ( V-s e c )
• De s ire d b re a kd o wn v o lt a g e re q uire s
Wd ≥ 1 0 -5 BV BD IF Vd
• ≈ 3 .1 x1 0 6
IF Vd A [ BVBD] 2
= 1 .4 x1 0 6
A BVBD
• Co nc lus io n: Mino rit y c a rrie r
• Ma jo rit y c a rrie r d rift re g io n d e v ic e s ha v e lo we r o n-s t a t e
re la t io ns hip s
lo s s e s a t la rg e BVBD.
q [ µn + µp ] Nd A V d
• IF ≈
Wd
+ i
diode
j
C
i (v )
stored charge in drift region of diode.
C
dc j
v j
d
diode
-
diode
j
s diode currents.
+ - +
• One dimensional diagram of a
power diode.
P N N
n(x,t) n(x,t)
time
0 Wd
x
• Redistribution of excess
carriers via diffusion ignored.
time
Equ;ivalent to carriers moving
with inifinte velocity.
time
time
stray
50 nH
+
D
f
I
o
• Test circuit example - step-down converter.
V 50 A
Diode
Voltage
0V
-100V
-200V
-300V
• Diode voltage transient
-400V
-500V
time
Diode
Current
100A
50A
0A
-100A
time
N - region
• More accurately model distributed nature p(x) = n(x)
of excess carrier distribution by dividing
it into several regions, each described by + N+
P Q
a quasi-static function. Termed the Q Q Q
3 region
region 1 2 4
lumped-charge approach.
x
δ d
diode
• Circuit diagram of improved diode model. Circuit written in
terms of physical equations of the lumped-charge model.
+
D
v Gd
CJ j
Vsense1
-
6
5 8
7
+ -
2
R
s + + +
Re
Ee Em Rm Edm Cdm
- - - Rdm
3
+
Emo
- 0
technical literature..
Copyright © by John Wiley & Sons 2003 Diodes - 25
Details of Lumped-Charge Model
Subcircuit Listing
.Subckt DMODIFY 1 9 Params: Is1=1e-6, Ise=1e-40, Tau=100ns, • Symbolize subcircuit listing into
+Tm=100ns,Rmo=Rs=.001, Vta=.0259, CAP=100p, Gde=.5,
+ Fbcoeff=.5, Phi=1, Irbk=1e20,Vrbk=1e20
SCHEMATICS using SYMBOL
*Node 1= anodeand Node 9 = cathode WIZARD
Dcj 1 2 Dcap ; Included for space charge capacitance and reverse
*breakdown. • Pass numerical values of
.model Dcap D (Is=1e-25 Rs=0 TT=0 Cjo={CAP} M={Gde} parameters Tau, Tm, Rmo,Rs, etc.
+FC={Fbcoeff} Vj={Phi} +IBV={Irbk} BV=Vrbk})
Gd 1 2 Value={(v(5)-v(6))/Tm +Ise*(exp(v(1,2)/Vta)-1)}
by entering values in PART
*Following components model forward and reverse recovery. ATTRIBUTE window (called up
Ee 5 0 VALUE = {Is1*Tau*(exp(V(1,2)/(2*Vta))-1)}; Ee=Qe
Re 5 0 1e6
within SCHEMATICS).
Em 6 0 VALUE = {(V(5)/Tm-i(Vsense1))*Tm*Tau/(Tm+Tau)}
*Em=Qm
• See reference shown below for
Rm 6 0 1e6 more details and parameter
Edm 7 0 VALUE = {v(6)};Edm=Qm extraction procedures.
Vsense1 7 8 dc 0 ; i(vsense1)=dQm/dt
Cdm 8 0 1 • Peter O. Lauritzen and Cliff L. Ma,
Rdm 8 0 1e9 "A Simple Diode Model with
Rs 2 3 4e-3
Emo 3 4 VALUE={2*Vta*Rmo*Tm*i(Vsense2) Forward and Reverse Recovery",
+/(v(6)*Rmo+Vta*Tm)}; Vm IEEE Trans. on Power Electronics,
Vsense2 4 9 dc 0 Vol. 8, No. 4, pp. 342-346, (Oct.,
.ends
1993)
Copyright © by John Wiley & Sons 2003 Diodes - 26
Simulation Results Using Lumped-Charge Diode Model
Diode voltage and current waveforms Simulation Circuit
L
Diode
10V
stray
50 nH
Voltage
0V
0V
Io
.
D
+ V f
-10V d 50 A
410ns 415ns 420ns
- 100 V
Sw
-100V
-200V
time
Diode
50A
recovery and forward
voltage overshoot.
Qualitatively matches
experimental
0A
measurements.
-50A
time