CA S8 Assembly

E N G .
S O U H A I L A N A D A
E N G . S O U H A I L A N A D A
INTRO:
As you know, any programming language is a medium through which
humans may give instructions to a computer.

Computer Languages:
HLL
LLL

Compiler :
HLL ---> | compiler|---> assembly --->| assembler|---> machine
language language
ENG. SOUHAI L A NADA
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HUMAN READABLE LANGUAGE:

- Computers like ones and zeros

A CPU can only execute Machine language instructions. Bits
stream

- Humans like symbols

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0001110010000110
ADD R6,R2,R6 ; increment index reg.
WHAT IS AN ASSEMBLY LANGUAGE?
Assembly language is a low level programming language. We use symbolic
names to represent operations, registers, and memory location.
Writing in assembly is efficient; because it is so close to machine language

A program written in assembly language must be converted to machine
language before the CPU can execute it.

A program called Assembler translates each assembly language statement into
a single machine language instruction

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Example,
A program expressed in IBM PC assembly language would look like this:

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Assembly Language
Instruction
Comment
MOV AX,A
; fetch the contents of
location ; A and put it in
register AX
ADD AX,4 ; Add 4 to AX
MOV A, AX
; Move the contents of AX
into
; location A
BENEFITS OF WRITING IN ASM
When you write in assembly language you by pass the application software
and communicate directly with CPU, BIOS and MS DOS.

Assembly language is faster than any other programming language.

Assembly language uses the memory more efficiently than high-level
language.

Assembly language is best language controlling I/o devices; because
some operations , such as reading and writing to specific memory
locations and I/O ports can be done easily in assembly, but may be
sometimes impossible at higher level language.
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ASSEMBLER
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Assembler is a program that turns symbols into machine instructions.

The assembler translates an assembly language program
one line at a time. The assembler recognizes four types of lines:
empty lines,
label definition lines,
directive lines, and
instruction lines.

An empty line is the line that only has spaces or tabs (i.e., white space)
Empty lines are ignored by the assembler.
A label definition line consists of a label definition. A label definition
consists of an identifier followed by a colon ( : ). As in most
programming languages, an identifier must start with a letter (or an
underscore) and may be followed by any number of letters,
underscores, and digits.
A directive line consists of an optional label definition, followed by the name of
an assembler directive, followed by the arguments for the directive. In this lab
we will consider three assembler directives: .data, .word, and .text.
An instruction line consists of an optional label definition, followed by
the name of an operation, followed by the operands. In this lab we will
consider five operations: load, store, set, add, and sub.

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COMMENTS
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Every line can conclude with a comment.

Comments begin with the character ! '

Whenever it encounters a '' ! '', the assembler ignores the ``!'' and the
remaining characters on the line.
E N G . S O U H A I L A N A D A
Computer Organization:
The simple computer model as discussed earlier:
RAM,
CPU,
I/P O/P And
System Bus to connect
various components of computer.

Typical Von Neumann Machine
CU
The control unit is the main part of the processor. It performs its task by
repeatedly cycling through the following steps:

1. Read (fetch) the next instruction from memory.
2. Examine the instruction to determine what it is and to find any possible errors.
3. Execute the instruction.

These steps are known as the fetch-execute
cycle.
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INTERACTION BETWEEN PROCESSOR AND MEMORY.
to execute an instruction, the processor must be able to request 3 things from
memory:
1. instruction FETCH
2. operand (variable) LOAD
3. operand (variable) STORE

the memory really only needs to be able to do 2 operations
1. read (fetch or load)
2. write (store)
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instructions and operands are stored in memory.
before they can be used by the processor, they must be fetched/loaded

processor steps involved:
1. fetch the instruction

2. figure out what the instruction is -- DECODE
IT IS A MULT INSTRUCTION
this also reveals how many operands there are, since
the number of operands is fixed for any given instruction
THERE ARE 3 OPERANDS x,y,z
3. load operand(s)
OPERANDS ARE y AND z
4. do the operation specified by the instruction
MULTIPLY y AND z TOGETHER
5. store result(s) (if any)
RESULT GOES INTO VARIABLE x

EXECUTE AND FETCH CYCLE:
In order to read the next instruction from memory,
the control unit needs to know the location (memory address) of the instruction. This
address is kept in
a special register called the program counter (PC).

The PC is a special register and is normally located in the control unit.
It always contains the address of the next instruction, not the current one.
When the next instruction is fetched, it is stored in the instruction register (IR),

IR: another special-purpose register, that always contains the current instruction.
Note that as soon as the next instruction is fetched and is stored in the IR it becomes
the current instruction
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Therefore:

The fetch-execute cycle can now be rewritten as:
1. Read the instruction thats pointed to by the PC from memory and move it into
the IR.
2. Increment the PC.
3. Decode the instruction in the IR.
4. If the instruction has to read an operand from memory, calculate the operands
address
(this is called the effective address, or EA) and read the operand from memory.
5. Execute the current instruction from the IR.
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REGISTER
Information inside Microprocessor is stored in Registers.

There are three sizes of registers:
8-bit, 16-bit and on 386 and above 32-bit. .

In 8086, In total there are fourteen 16-bit registers.
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There are four different types registers;
general purpose registers,
address registers,
status registers
stack registers.

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CPU REGISTERS:

Inside the CPU: (8086 processor)

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CPU registers are very special memory
locations constructed from flip-flops.
GENERAL PURPOSE REGISTERS
8086 CPU has 4 general purpose data registers, each register has its own
name:
Hold data for an operation.

AX - the accumulator register (divided into AH / AL).
BX - the base address register (divided into BH / BL).
CX - the count register (divided into CH / CL).
DX - the data register (divided into DH / DL).
.
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These are 16-bit registers.
AX is split up into :
AH which contains the high byte and
AL which contains the low byte.
for example if: AX= 0011000000111001b,
then
AH=00110000b and AL=00111001b.
ADDRESS REGISTERS
Hold the address of an instruction or data

1- Segment REGISTERS
2- Index REGISTERS
3- pointer REGISTERS

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They are mainly used for string instructions. There are three
index registers SI (source index), DI (destination index) and IP
(instruction pointer).)
IP is an index register but it can't be manipulated directly as it
stores the address of the next instruction.

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Index
Registers

SI Source Index used by string operations as source
DI
Destination
Index
used by string operations as destination
INDEX REGISTER
SI - source index register: Can be used for pointer addressing of data
Used as source in some string processing instructions
Offset address relative to DS

DI - destination index register: Can be used for pointer addressing of data
Used as destination in some string processing instructions
Offset address relative to ES

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POINTER REGISTERS
IP

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Pointer
Registers

IP
Instruction
Pointer
16-bit number that points to the offset of the
next instruction
SP Stack Pointer
16-bit number that points to the offset that the
stack is using
BP Base Pointer used to pass data to and from the stack
BP - base pointer: Primarily used to access parameters passed via the
stack
Offset address relative to SS

SP - stack pointer: Always points to top item on the stack
Offset address relative to SS
Always points to word (byte at even address)
An empty stack will had SP = FFFEh

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STACK REGISTERS

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Stack registers
BP and SP are stack registers and are
used when dealing with the stack.
STATUS REGISTERS

Keeps the current status of the processor, and is called FLAG registers.

Consists of 9 status bits. These bits are also called flags, because they can
either be SET (1) or NOT SET (0).

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STATUS REGISTERS

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Consists of 9 status bits. These bits are also called flags, because
they can either be SET (1) or NOT SET (0).
Flags Register
Abr. Name bit n Description
OF Overflow Flag 11 indicates an overflow when set
DF Direction Flag 10 used for string operations to check direction
IF Interrupt Flag 9 if set, interrupt are enabled, else disabled
TF Trap Flag 8 if set, CPU can work in single step mode
SF Sign Flag 7
if set, resulting number of calculation is
negative
ZF Zero Flag 6 if set, resulting number of calculation is zero
AF Auxiliary Carry 4 some sort of second carry flag
PF Parity Flag 2 indicates even or odd parity
CF Carry Flag 0 contains the left-most bit after calculations
Carry Flag (CF) - this flag is set to 1 when
there is an unsigned overflow. For example
when you add bytes 255 + 1 (result is not
in range 0...255). When there is no overflow
this flag is set to 0.

Parity Flag (PF) - this flag is set to 1 when
there is even number of one bits in result,
and to 0 when there is odd number of one
bits.

Zero Flag (ZF) - set to 1 when result is zero.
For non-zero result this flag is set to 0.

Overflow Flag (OF) - set to 1 when there is a
signed overflow. For example, when you
add bytes 100 + 50 (result is not in range -
128...127).

Interrupt enable Flag (IF) - when this flag is set
to 1 CPU reacts to interrupts from external
devices.

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SEGMENT
In the x86 processor architecture, memory addresses are specified in two parts
called the segment and the offset.
One usually thinks of the segment as specifying the beginning of a block of memory
allocated by the system and the offset as an index into it.

Segment values are stored in the segment registers. There are four or more
segment registers:
CS contains the segment of the current instruction (IP is the offset),
SS contains the stack segment (SP is the offset),
DS is the segment used by default for most data operations,

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SEGMENT REGISTERS
CS - points at the segment containing the current program.
DS - generally points at segment where variables are defined.
ES - extra segment register, it's up to a coder to define its usage.
SS - points at the segment containing the stack.

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SS Address
DS Address
CS Address
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Segment registers work together with general purpose register to
access any memory value.

example1 :
if we would like to access memory at the physical address 12345h
(hexadecimal),

we could set the DS = 1230h and SI = 0045h.

This way we can access much more memory than with a single register,
which is limited to 16 bit values.

The CPU makes a calculation of the physical address by multiplying the
segment register by 10h and adding the general purpose register to it
(1230h * 10h + 45h = 12345h):

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SEGMENT OFFSET
Address at register DS is 045F [0]
Address of the data 0032

Therefore the physical address is 045F0
0032
------------
04622
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example2:
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THE INTEL 8086 FAMILY OF MICROPROCESSOR
The IBM PC family consists of IBM PC, PC XT, PC AT, PS/1, and PS/2.
They are all based on the Intel 8086, 8088, 80286, 80386, 80486,

Intel introduced the 8086 in 1978 as its first 16 bit-bit Microprocessor.
Intel introduced the 8088 in 1979, is essentially the same as the 8086 BUT,

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8086 8080
16 bits data bus 8 bits data bus
faster clock rate than 8080
Less expensive than 8086
The 8086
(
also called iAPX 86) is a 16-bit microprocessor chip designed by Intel
between early 1976 and mid-1978, when it was released.
The 8086 gave rise to the x86 architecture of Intel's future processors
In this Slide we concentrate on the organization and instructions of the
8086/8088.
As This processor have the simplest structure..
It forms the basic set of instruction for the other microprocessor in the
family.
Therefore, they give insight to the organization of the more advanced
processors.

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INSTRUCTIONS, OPERANDS, ADDRESS
Instructions are operations performed by the CPU.
Operands are entities operated upon by the instruction.
Addresses are the locations in memory of specified data.

The terms instruction and mnemonic are used interchangeably in this
document to refer to the names of x86 instructions.
Although the term opcode is sometimes used as a synonym for instruction,
(the thing the instruction is to do),
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An instruction is a statement that is executed at runtime.
An x86 instruction statement can consist of four parts:

Label (optional)
Instruction (required)
Operands (instruction specific)
Comment (optional)

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ENG. SOUHAI L A NADA 41
Instructions begin with a mnemonic which represents the
operation to be performed.

Ex.
MOVE, ADD, SUB, CLR, etc.
Note:
How an operand is interpreted
depends on the information provided
and the addressing mode used for that
operand.

mnemonics for opcodes
labels for memory locations
Two of the parts (LABEL and COMMENTS) are optional.
Two of the parts (OPCODE and OPERANDS) are mandatory.

MOVE VALUE 5 To the Register AX
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Label OpCode Operand Comment
Next: MOV AX , 5 ! initialize
Counter
Assembly Instruction
syntax:
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Types of instructions:
Instruction for Arithmetic/Logic
Instruction for Moving Data
Instruction for decision making
The Intel assembler uses (destination<-source) for operands.
Operands are separated by commas (,)

For instructions with two operands, :
the first (righthand) operand is the source operand, and
the second (lefthand) operand is the destination operand
(that is, destination -> source).

Important Note
An another set of instruction can have zero to three operands uses the
opposite order (source --> destination).

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Some of the instructions have two operands,
others of these instructions have a single operand, and finally
instructions have no operands at all
EXAMPLE:

THE INSTRUCTION ADD HAS 2 OPERANDS X AND Y
Data of X is available in register X register to hold data
Data of Y is available in memory register to hold address that
contains data

Has 2 operands,
Add 5 to AX register
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ADD X,Y
ADD AX, 5
One Operand
;Increment CX register

No Operand
;RETURN

Operands could be,
Registers OR Variables OR Constants
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RET
CX INC
We will briefly discuss the missing link between assembly language and
other HLL:

HLL: Add Instruction is

Ass: Add Instruction is

We used here 3 mnemonics :
1- LOAD : obtains the value from the location a.
2- ADD : adds the value 5 to the loaded value.
3- STORE : saves the result again
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LOAD a
ADD 5
STORE a
a = a + 5 ;
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A FEW EXAMPLE INSTRUCTIONS
ADD/SUB/MUL/DIV/AND/OR dest, source
Performs operation on dest and source and stores result in dest.
NEG location
Computes 2s complement of value in location, then stores it into
location.
NOT location
Computes complement of value in location, then stores it into
location.
CLR location
Sets value of byte/word/long at location to 0.
MOVE dest, source
Moves value of source to dest location.
The arithmetic and logical instructions take the following forms:

add reg, reg/memory/constant
sub reg, reg/memory/constant
cmp reg, reg/memory/constant
and reg, reg/memory/constant
or reg, reg/memory/constant
not reg/memory
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where reg is any of ax, bx, cx, or dx;

constant is a numeric constant (using hexadecimal notation), and

memory is an operand specifying a memory location
The add instruction adds the value of the second operand to the first (register) operand,
leaving the sum in the first operand.
The sub instruction subtracts the value of the second operand from the first, leaving the
difference in the first operand.
The cmp instruction compares the first operand against the second and saves the result
of this comparison for use with one of the conditional jump instructions (described in
a moment).
The and and or instructions compute the corresponding bitwise logical operation on the
two operands and store the result into the first operand.
The not instruction inverts the bits in the single memory or register operand.

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MOV
The mov instruction is actually two instruction classes merged into the same
instruction.
The two forms of the mov instruction take the following forms:
mov reg, reg/memory/constant
mov memory, reg

.
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EXPLAIN, MOV AX,5
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The Arithmetic & Logical Unit
The arithmetic and logical unit (ALU) is where most of the action takes
place inside the CPU.
Copies the value from AX into the ALU,
Sends the value five to the ALU,
Instructs the ALU to add these two values together,
Moves the result back into the AX register.
THE CONTROL TRANSFER INSTRUCTIONS
interrupt the sequential execution of instructions in memory and transfer control
to some other point in memory either unconditionally, or after testing the
result of the previous cmp instruction. These instructions include the
following:

unconditional jumps

The basic instruction that transfers control to another point in the program is
JMP.

The basic syntax of JMP instruction:
JMP label

Label will be discussed later
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SHORT CONDITIONAL JUMPS
there are instructions that do a conditional jumps (jump only when some
conditions are in act).
General example

Ja dest -- Jump if above CF=0 and ZF=0
jae dest -- Jump if above or equal (>=). CF=0
jb dest -- Jump if below
jbe dest -- Jump if below or equal
Je dest -- Jump if equal ZF=1
Jne dest -- Jump if not equal ZF=0
jz dest -- Jump on zero or equal ZF=1
JNZ dest -- Jump on not zero ZF=0
iret -- Return from an interrupt
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Instruction Description Condition Opposite Instruction
JZ , JE Jump if Zero (Equal). ZF = 1 JNZ, JNE
JC , JB,
JNAE
Jump if Carry (Below, Not Above Equal). CF = 1 JNC, JNB, JAE
JS Jump if Sign. SF = 1 JNS
JO Jump if Overflow. OF = 1 JNO
JPE, JP Jump if Parity Even. PF = 1 JPO
JNZ , JNE Jump if Not Zero (Not Equal). ZF = 0 JZ, JE
JNC , JNB,
JAE
Jump if Not Carry (Not Below, Above
Equal).
CF = 0 JC, JB, JNAE
JNS Jump if Not Sign. SF = 0 JS
JNO Jump if Not Overflow. OF = 0 JO
JPO, JNP Jump if Parity Odd (No Parity). PF = 0 JPE, JP
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I- Jump instructions that test single flag

Instruction Description Condition
Opposite
Instructio
n
JE , JZ
Jump if Equal (=).
Jump if Zero.
ZF = 1 JNE, JNZ
JNE , JNZ
Jump if Not Equal (<>).
Jump if Not Zero.
ZF = 0 JE, JZ
JG , JNLE
Jump if Greater (>).
Jump if Not Less or Equal (not <=).
ZF = 0
and
SF = OF
JNG, JLE
JL , JNGE
Jump if Less (<).
Jump if Not Greater or Equal (not >=).
SF <> OF JNL, JGE
JGE , JNL
Jump if Greater or Equal (>=).
Jump if Not Less (not <).
SF = OF JNGE, JL
JLE , JNG
Jump if Less or Equal (<=).
Jump if Not Greater (not >).
ZF = 1
or
SF <> OF
JNLE, JG
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II- Jump instructions for signed numbers

<> - sign means not equal.
Instruction Description Condition Opposite Instruction
JE , JZ
Jump if Equal (=).
Jump if Zero.
ZF = 1 JNE, JNZ
JNE , JNZ
Jump if Not Equal (<>).
Jump if Not Zero.
ZF = 0 JE, JZ
JA , JNBE
Jump if Above (>).
Jump if Not Below or Equal
(not <=).
CF = 0
and
ZF = 0
JNA, JBE
JB , JNAE, JC
Jump if Below (<).
Jump if Not Above or Equal
(not >=).
Jump if Carry.
CF = 1 JNB, JAE, JNC
JAE , JNB, JNC
Jump if Above or Equal (>=).
Jump if Not Below (not <).
Jump if Not Carry.
CF = 0 JNAE, JB
JBE , JNA
Jump if Below or Equal (<=).
Jump if Not Above (not >).
CF = 1
or
ZF = 1
JNBE, JA
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III - Jump instructions for unsigned numbers
label -- symbolic name of memory location
assigns a symbolic name to the address corresponding to line:
LOOP: ADD Ax,5
BRp LOOP

To declare a label in your program, just type its name and add ":" to the end,
label can be any character combination but it cannot start with a number,
for example here are 3 legal label definitions:
label1:
label2:
a: Label can be declared on a separate line or before any other instruction, for example:
x1:
MOV AX, 1

x2: MOV AX, 2

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here's an example of JMP instruction to calculate the sum of two numbers:

org 100h
mov ax, 5 ; set ax to 5.
mov bx, 2 ; set bx to 2.
jmp calc ; go to 'calc'.
back: jmp stop ; go to 'stop'.
calc:
add ax, bx ; add bx to ax.
jmp back ; go 'back'.
stop:
ret ; return to operating system.

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anything after a semicolon is a Comment (or, Exclamation Mark)
ignored by assembler
used by humans to document/understand programs
tips for useful comments:
avoid restating the obvious, as decrement R1
provide additional insight, as in accumulate product in R6
use comments to separate pieces of program
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include "emu8086.inc"
org 100h

mov al, 25 ; set al to 25.
mov bl, 10 ; set bl to 10.
cmp al, bl ; compare al - bl.
je equal ; jump if al = bl (zf = 1).
putc 'n' ; if it gets here, then al <> bl,

jmp stop ; so print 'n', and jump to stop.

equal: ; if gets here,
putc 'y' ; then al = bl, so print 'y'.

stop:
ret ; gets here no matter what.
here's an example of CMP instruction and conditional jump:
.html 07 /emu/asm_tutorial_ 253 jbwyatt.com/ http://

C or C++ or Java :
type variable_name;

ASM:
variable _name data type value

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Data type is to locate the memory

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DB Define Byte
# tells the assembler to allocate 8 bits

DW
Define Word
DD
Define double word
# tells the assembler to allocate 32 bits
value is required --< it gives the variable an initial value
--< for explicitly leave value undefined, use the '?' character

EXAMPLES:

Alpha DB 4
means declare variable name Alpha , initialized by the value 4 and locate a Byte

LETTERS DB 27h, 48h,32h,69h
means declare 4 variables each 1 byte (total locate 4 bytes) , each bytes
initialized s shown
NUM DW ?
means declare one variable NUM the initialization is not clear yet.

MULLTIPLICATION DW 204Ah
When running the program the first address in the memory will be the lower
byte
(4A h)
the next location will be the high byte (20 h)
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CONTINUE
MSG DB HELLO
CONSTANT_e DD 2.71828
LETTER_a DB 'a'
STRING1 DB 'This is a string.', 0 string better terminated by
null

We can use the directive EQU (Equates) as follow:
syntax is : name EQU constant
LF EQU 0A h

OR, MOV DL,0A h
MOV LF,DL
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CHARACTER CONSTANTS
A character constant is a single character enclosed in single or double quotes.
MASM stores the
value in memory as the characters binary ASCII code. Examples are
'A'
"d"
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String Constants
A string constant is a sequence of characters (including spaces) enclosed in single or
double
quotes:
'ABC'
'X'
"Goodnight, Gracie"
'4096'
Embedded quotes are permitted when used in the manner shown by the following
examples:
"This isn't a test"
'Say "Goodnight," Gracie'
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RESERVED WORDS
Reserved words have special meaning in MASM and can only be used in their correct
context. There
are different types of reserved words:
Instruction mnemonics, such as MOV, ADD, and MUL.
Directives, which tell MASM how to assemble programs.
Attributes, which provide size and usage information for variables and operands.
Examples are
BYTE and WORD.
Operators, used in constant expressions.
Predefined symbols, such as @data, which return constant integer values at
assembly time.
A complete
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Pseudo-operations
do not refer to operations executed by program
used by assembler
look like instruction, but opcode starts with dot
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A way to give information to the assembler. Or
It is a message to the assembler that tells the assembler something it needs
to know in order to carry out the assembly process;
for example, an assemble directive tells the assembler where a program
is to be located in memory.

origin directives:

Tells the assembler where to load instruction and data into memory.
Example,
68000 reserves the first 1024 bytes for memory for exception vectors.
Therefore, your program will start at location 1024;

ORG 1024 or ORG $400 (1024 =400H)
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we introduce three directives: .data, .text, and .word.

The first two (.data and .text) are used to separate variable declarations and
assembly language instructions.

The .word directive is used to allocate and initialize space for a variable..

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Each group of variable declarations should be preceded by a
.data directive.

Each group of assembly language instructions should be
preceded by a .text directive. Using these directives, you
could mix variable declarations and assembly language
instructions
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Opcode Operand Description
.ORIG
address starting address of program
.END
end of program
.BLKW
n allocate n words of storage
.FILL
n allocate one word, initialize with
value n
.STRINGZ
n-character
string
allocate n+1 locations,
initialize w/characters and null
terminator
TRAP CODES
LC-3 assembler provides pseudo-instructions for each trap code,
Code Equivalent Description
HALT TRAP x25
Halt execution and print message to
console.
IN TRAP x23
Print prompt on console,
read (and echo) one character from keybd.
Character stored in R0[7:0].
OUT TRAP x21
Write one character (in R0[7:0]) to console.
GETC TRAP x20
Read one character from keyboard.
Character stored in R0[7:0].
PUTS TRAP x22
Write null-terminated string to console.
Address of string is in R0.
A variable declaration,
starts with: a label definition (the name of the variable),
followed by a .word directive,
followed by the initial value for the variable

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Examples:

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.data
# identifies the start of the declaration section there can
be more than 1 (.data) section in a program
.code

# identifies where instructions are there can be more
than 1 .code section in a program
.stack

# You get this set of memory, called a stack. Don't worry
about it for now, just use it.
.model
# Gives the assembler information about how to place
stuff in memory, and how to call stuff outside the program
(like library calls)

Example:
Give directives to allocate space for three variables, x, y, and z. You should
initialize these variables to decimal 23, hexadecimal 3fce, and decimal 42,
respectively.

.data ! start a group of variable declarations
x: .word 23 ! int x = 23;
y: .word 0x3fce ! int y = 0x3fce;
z: .word 42 ! int z = 42;
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THE X86 INSTRUCTION SET
See Hand OUT
78
WRITING AN ASSEMBLY PROGRAM
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STYLE GUIDELINES
Use the following style guidelines to improve the readability and
understandability of your programs:
1. Provide a program header, with authors name, date, etc., and purpose of program.
2. Start labels, opcode, operands, and comments in same column for each line. (Unless
entire line is a comment.)
3. Use comments to explain what each register does.
4. Give explanatory comment for most instructions.
5. Use meaningful symbolic names.
Mixed upper and lower case for readability.
ASCII to Binary, Input Routine, Save R1
6. Provide comments between program sections.
7. Each line must fit on the page -- no wraparound or truncations.
Long statements split in aesthetically pleasing manner.
SAMPLE PROGRAM
Count the occurrences of a character in a file.

Count = 0
(R2 = 0)
Ptr = 1st file character
(R3 = M[x3012])
Input char
from keybd
(TRAP x23)
Done?
(R1 ?= EOT)
Load char from file
(R1 = M[R3])
Match?
(R1 ?= R0)
Incr Count
(R2 = R2 + 1)
Load next char from file
(R3 = R3 + 1, R1 = M[R3])
Convert count to
ASCII character
(R0 = x30, R0 = R2 + R0)
Print count
(TRAP x21)
HALT
(TRAP x25)
NO
NO
YES
YES
CHAR COUNT IN ASSEMBLY LANGUAGE (1 OF 3)
;
; Program to count occurrences of a character in a file.
; Character to be input from the keyboard.
; Result to be displayed on the monitor.
; Program only works if no more than 9 occurrences are found.
;
;
; Initialization
;
.ORIG x3000
AND R2, R2, #0 ; R2 is counter, initially 0
LD R3, PTR ; R3 is pointer to characters
GETC ; R0 gets character input
LDR R1, R3, #0 ; R1 gets first character
;
; Test character for end of file
;

TEST ADD R4, R1, #-4 ; Test for EOT (ASCII x04)
BRz OUTPUT ; If done, prepare the output
;
; Test character for match. If a match, increment count.
;
NOT R1, R1
ADD R1, R1, R0 ; If match, R1 = xFFFF
NOT R1, R1 ; If match, R1 = x0000
BRnp GETCHAR ; If no match, do not increment
ADD R2, R2, #1
;
; Get next character from file.
;
GETCHAR ADD R3, R3, #1 ; Point to next character.
LDR R1, R3, #0 ; R1 gets next char to test
BRnzp TEST
;
; Output the count.
;
OUTPUT LD R0, ASCII ; Load the ASCII template
ADD R0, R0, R2 ; Covert binary count to ASCII
OUT ; ASCII code in R0 is displayed.
HALT ; Halt machine

;
; Storage for pointer and ASCII template
;
ASCII .FILL x0030
PTR .FILL x4000
.END

I SA
An instruction set, or instruction set architecture (ISA),
is the part of the computer architecture related to
programming,

The instruction set architecture (ISA)
is the interface between the software and hardware.

1. including the native data types, instructions,
2. registers,
3. addressing modes,
4. memory architecture,
5. interrupt and
6. exception handling, and external I/O.

An ISA includes a specification of the set of opcodes (machine
language), and the native commands implemented by a particular
processor.
85
An ISA encompasses

Instructions and Instruction Formats
Data Types, Encodings, and Representations
Programmable Storage: Registers and Memory
Addressing Modes: Accessing Instructions and Data
86
ADDRESSING MODES

Register direct, immediate, absolute long, register indirect,
indexed basic, auto increment, auto decrement When to use
the various modes

87

CA S8 Assembly

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