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Chapter 16 CMOS Amplifiers

16.1
16.2
16.3
16.4
16.5
16.6

General Considerations
Operating Point Analysis and Design
CMOS Amplifier Topologies
Common-Source Topology
Summary and Additional Examples
Chapter Summary

Chapter Outline

CH 16 CMOS Amplifiers

Example: Desired I/O Impedances

Rin

CH 16 CMOS Amplifiers

Ramp 0

Method to Measure the I/O Impedances

vX
Rin
iX

Rout

vX

iX

To measure Rin(Rout), deactivate all the other independent


sources in the circuit and find the ratio of vX/iX.
CH 16 CMOS Amplifiers

Example: Input Impedance of a Simple Amplifier

i X 0 Rin

CH 16 CMOS Amplifiers

The Concept of Impedance at a Node

When the other node of a port is grounded, it is more


convenient to use the concept of impedance at a node.
CH 16 CMOS Amplifiers

Example: Impedance Seen at Drain

Rout rO

CH 16 CMOS Amplifiers

Example: Impedance Seen at Source

Rout

CH 16 CMOS Amplifiers

gm

Impedance Summary

Looking into the gate, we see infinity.


Looking into the drain, we see rO if the source is (ac) grounded.
Looking into the source, we see 1/gm if the gate is (ac)
grounded and rO is neglected.
CH 16 CMOS Amplifiers

Bias and Signal Levels for a MOS Transistor

Bias point analysis establishes the region of operation and the


small-signal parameters.
On top of the bias point, small signals are applied to the circuit.

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General Steps in Circuit Analysis

First, the effects of constant voltage/current sources are


analyzed when signal sources are deactivated.
Second, small-signal analysis is done when constant sources
are set to zero.
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Simplification of Supply Voltage Notation

CH 16 CMOS Amplifiers

12

Example: Amplifier Driven by a Microphone

Microphone Output
20mV
0V

Since the DC (average) value is at zero, and 20mV is not


sufficient to turn on M1, M1 is off and Vout is at VDD.

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Example: Amplifier with Gate Tied to VDD

Since the gate voltage level is fixed at VDD, no signal current


will be produced my M1, leading to no amplification.

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Example: Amplifier with Gate Bias

With proper value of VB, M1 can operate in the desired


saturation region and amplify the incoming voice signal.

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Simple Biasing

VGS

R2

VDD
R1 R2

In (a), VGS=VDD, whereas in (b) VGS equals to a fraction of VDD.


CH 16 CMOS Amplifiers

16

Example: Bias Current and Maximum RD


VTH 0.5V

nCox 100A / V 2
W L 5 0.18

0
R1 20K
R2 15K

ID

R2

VDD VTH 102 A


R1 R2

VTH 0.271V VRD m ax 1.529 RD 15 K

1
W
nCox
2
L

VD m in VGS

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Capacitive Coupling

Capacitive coupling is used to block the zero DC output value


of the microphone and pass the voice signal to the amplifier.
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Biasing with Source Degeneration

R2VDD
VGS V1 VTH V 2V1
VTH
R

R
2
1
1
V1
W
nCox RS
L
2
1

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Example: ID and Maximum RD for Source Degeneration Biasing

VTH 0.5V

nCox 100A / V 2
W / L 5 / 0.18
0

V1

1
0.36V
W
nCox RS
L

RV
VGS V1 VTH V12 2V1 2 DD VTH
R1 R2
V (VX VTH )
RD DD
3.25K
ID
CH 16 CMOS Amplifiers

0.974V

20

Example: Maximum W/L and Minimum RS


VTH 0.5V

nCox 100A / V 2
RD 2.5K

V V
A W
2
I D m ax DD Y 406A 50 2 0.38V
RD
V L
W
L

56.2
m ax

CH 16 CMOS Amplifiers

VGS VTH

RS min

2I D

1.041V
W
nCox
L
V VGS
X
604
ID

21

Self-Biased MOS Stage

ID

1
W
nCox VDD RS RD I D VTH 2
2
L

The gate voltage is provided by the drain with no voltage drop


across RG and M1 is always in saturation.
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Example: Self-Biased MOS Stage

nCox 100A / V 2
VTH 0.5V

I D 556A
I D 278A RD 2.867K

CH 16 CMOS Amplifiers

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Example: PMOS Stage with Biasing


p Cox 50A / V 2
W L 5 0.18

0
R1 20 K
R2 15K
VTH 0.5V

VGS

R2
VDD 0.771V
R1 R2

1
W
2
I D p Cox VGS VTH 56A
2
L
Saturation RD m ax 27.3K
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Example: PMOS Stage with Self-Biasing

p Cox 50A / V 2
W L 5 0.18
0
VTH 0.5V

1
W
I D p Cox VDD I D RD VTH
2
L
I D 418 A

CH 16 CMOS Amplifiers

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Good Example of Current Source

As long as a MOS transistor is in saturation region and =0, the


current is independent of the drain voltage and it behaves as an
ideal current source seen from the drain terminal.
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Bad Example of Current Source

Since the variation of the source voltage directly affects the


current of a MOS transistor, it does not operate as a good
current source if seen from the source terminal
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Possible I/O Connections to a MOS Transistor

Of all the possible I/O connections to a MOS transistor, only


(a,d), (a,e) and (b,d) are functional.
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Common Source (CS) Stage

If the input is applied to the gate and the output is sensed at the
drain, the circuit is called a common-source (CS) stage.
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Small-Signal Model of CS Stage

vout

g m v1
RD
Av g m RD

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Example: CS Stage

I D 1mA

nCox 100A / V 2
VTH 0.5V

W
1
g m 2nCox I D
L
300
Av g m RD 3.33

CH 16 CMOS Amplifiers

VGS VTH
VGS VTH

2I D

1.1V
W
nCox
L
0.6V ,VDD RD I D 0.8V

0.8 0.6 Saturation

31

Example: Faulty CS Stage Design


Power 1mW
VDD 1.8V
Av 5
VTH 0.5V

nCox 100A / V 2
W L 5 0.18
0

Power 1mW I D 556A g m 1 569


Av 5 RD 2845

However, no solution exists since M1 is out of the saturation


region (VDD-IDRD<VGS-VTH).
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CS Stage I/O Impedance Calculation

vx
Rin
ix

CH 16 CMOS Amplifiers

Rout

vx
RD
ix

33

CS Stage Including Channel-Length Modulation

Av g m RD || rO
Rout RD || rO

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Example: Gain
No Channel-Length Modulation

With Channel-Length Modulation

Av x

Av x 2
1
rO
RD
I D
1

I D RD

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Example: RD

Av g m rO
Av

CH 16 CMOS Amplifiers

W
L 2 nCoxWL
ID
ID

2 nCox

36

CS Stage with Current Source Load

Av g m1 rO1 || rO 2
Rout rO1 || rO 2

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Example: CS Stage with Current Source Load

Av g m1 rO1 || rO 2

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CS Stage with Diode-Connected Load

Av g m1
|| rO 2 || rO1
gm2

1
Rout
|| rO 2 || rO1
gm2

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Example: CS Stage with Diode-Connected PMOS

Av g m 2
|| rO 2 || rO1
g m1

CH 16 CMOS Amplifiers

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CS Stage with Source Degeneration

Av

CH 16 CMOS Amplifiers

RD
1
RS
gm

41

Example: CS Stage with Source Degeneration

Av

CH 16 CMOS Amplifiers

RD
1
1

g m1 g m 2

42

Example: Degeneration Resistor


Without Degeneration

With Degeneration

g m 1 200

g m 1 200

Av 8

Av 4

g m RD 8 RD 1.6 K
g m RD
4 RS 1 g m 200
1 g m RS

CH 16 CMOS Amplifiers

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Effective Transconductance

Gm

CH 16 CMOS Amplifiers

iout
gm

vin 1 g m RS

44

Effect of Transistor Output Resistance

Rout rO g m rO 1RS
Rout rO 1 g m RS

CH 16 CMOS Amplifiers

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Stage with Explicit Depiction of rO

Sometimes, the transistors output resistance is explicitly


drawn to emphasize its significance.
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Example: NMOS Current Source Design


I D 1mA
Rout 20K

nCox 100A / V 2
0.25V 1
VDS m in 0.3V

VDS min VGS VTH 0.3


2I D
1
gm

VGS V TH 150

1 g m R S rO RS 20K

RS 578
CH 16 CMOS Amplifiers

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Example: Output Resistance of CS Stage with Degeneration I

1 1

R out rO1 1 g m1
gm2 gm2

g m1 g m 2 g m Rout 2rO1

CH 16 CMOS Amplifiers

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Example: Output Resistance of CS Stage with Degeneration II

Rout 1 g m1rO1 rO 2 rO1


Rout g m1rO1rO 2

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Example: Failing Microphone Amplifier

No Amplification!!

100 || 50 K
VX
2.5V 2.5mV
100 K 100 || 50 K

Because of the microphones small low-frequency output


resistance (100), the bias voltage at the gate is not sufficient
to turn on M1.
CH 16 CMOS Amplifiers

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Capacitive Coupling

To fix the problem in the previous example, a method known as


capacitive coupling is used to block the DC content of the
microphone and pass the AC signal to the amplifier.
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Capacitive Coupling: Bias Analysis

1
W
I D nCox
2
L

R2

VDD VTH
R1 R2

Since a capacitor is an open at DC, it can be replaced by an


open during bias point analysis.
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Capacitive Coupling: AC Analysis

vout
g m RD || rO
vin

Since a capacitor is a short at AC, it can be replaced by a short


during AC analysis.

CH 16 CMOS Amplifiers

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Capacitive Coupling: I/O Impedances

Rin1
Rin 2 R1 || R2

CH 16 CMOS Amplifiers

Rout RD || rO

54

Example: Amplifier with Direction Connection of Speaker

This amplifier design still fails because the solenoid of the


speaker shorts the drain to ground.
CH 16 CMOS Amplifiers

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Example: Amplifier with Capacitive Coupling at I/O

Req RD || Rsp 8

Av g m RD || Rsp 0.08

This amplifier design produces very little gain because its


equivalent output resistance is too small.
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Source Degeneration with Bypass Capacitor

R1 || R2
Av
g m RD
RG R1 || R2

It is possible to utilize degeneration for biasing but eliminate its


effect on the small-signal by adding a bypass capacitor.
CH 16 CMOS Amplifiers

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Example: Source Degeneration with Bypass Capacitor Design


Av 5
Rin 50K
Power 5mW

nCox 100A / V 2
VTH 0.5V

0
VDD 1.8V
VRS 400mV

RS 148
g m 1 46.3
W L 864
RD 463 2
R1 64.3K, R2 225K
CH 16 CMOS Amplifiers

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Concept Summary

CH 16 CMOS Amplifiers

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Common-Gate Stage

In a common-gate stage, the input is applied at the source


while the output is taken at the drain.
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Small Signal Analysis of Common-Gate Stage

Av g m RD

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Example: Common-Gate Stage Design

I D 0.5mA
W L 50

nCox 100A / V 2
VTH 0.5V
VDD 1.8V

VDD I D RD Vb VTH RD 2.71k


g m 1 447 Av 6.06

CH 16 CMOS Amplifiers

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Input Impedance of Common-Gate Stage

1
Rin
gm

CH 16 CMOS Amplifiers

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The Use of Low Input Impedance

The low input impedance of a common-gate stage can be used


to impedance match a 50- transmission line.
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Output Impedance of Common-Gate Stage

Rout rO || RD

CH 16 CMOS Amplifiers

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Example: Alternate Av Expression of CG Stage

Rout
Av
Rin

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CG Stage in the Presence of Finite Source


Resistance

vout
RD

1
vin
RS
gm
CH 16 CMOS Amplifiers

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Output Impedance of a General CG Stage

Rout RD || 1 g m RS rO RS

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68

CG and CS Stages Output Impedance Comparison

RoutCG RoutCS RD || 1 g m RS rO RS
Since when calculating the output impedance, the input voltage
source of the CG stage is grounded, the result will be identical
to that of a CS stage if the same assumptions are made for both
circuits.
CH 16 CMOS Amplifiers

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Example: AV and Rout

vout
g m1 RD

vin 1 g m1 g m 2 RS

=0

CH 16 CMOS Amplifiers

Rout g m1rO1
|| RS rO1 || RD
gm2

>0

70

Example: CG Stage Lacking Bias Current

Although the capacitor C1 isolates the DC content of the signal


source, it also blocks the bias current of M1, hence turning it
OFF.
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Example: CG Stage with Source Shorted to Ground

Although there is now a path for bias current to flow to ground,


the signal current also goes with it, hence producing no gain.

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CG Stage with Proper Bias Circuitry

1
Rin
|| R1
gm

1
Av
g m RD
1 1 g m R1 RS

R1 is used to provide a path for bias current to flow without


directly shorting the source to ground.
However, it also lowers the input impedance of the circuit
CH 16 CMOS Amplifiers

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Input Current Flowing Paths

1
R1
gm
To maximize the useful current i2, R1 needs to be much larger
than 1/gm.
CH 16 CMOS Amplifiers

74

Example: CG with Complete Bias Network


nCox 100A / V 2
VTH 0.5V

0
Av 5
RS 0, R1 500
1 / g m 50
Power 2mW
VDD 1.8V

VGS 0.8V
W L 244
g m 2 I D / VGS VTH 136.4

RD 682
RG1 45k, RG 2 135k
CH 16 CMOS Amplifiers

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Example: Min W/L


nCox 100A / V 2
VTH 0.5V

0
Av 5
RS 0, R1 500
1 / g m 50
Power 2mW
VDD 1.8V

VDD I D RD VGS VR1 VTH


VDD
W

L
CH 16 CMOS Amplifiers

Av
VGS VTH VGS VTH VR1
2
2I D

VDD VR1

nCox 2
Av 2

76

Source Follower

Source follower sense the input at the gate and produces the
output at the source.
CH 16 CMOS Amplifiers

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Source Followers Response to an Input Change

As the input changes by a small amount, the output will follow


the input and changes by a smaller amount, hence the name
source follower.
CH 16 CMOS Amplifiers

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Small-Signal Model and Voltage Gain for Source Follower

vout
RS

1
vin
RS
gm

CH 16 CMOS Amplifiers

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Example: Source Follower with Current Source

VA

Av 1

CH 16 CMOS Amplifiers

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Source Follower Acting as a Voltage Divider

vout
RS

1
vin
RS
gm
CH 16 CMOS Amplifiers

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Complete Small-Signal Model with rO

vout
rO || RS

vin r || R 1
O
S
gm

CH 16 CMOS Amplifiers

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Example: Source Follower with a Real Current Source

Av

CH 16 CMOS Amplifiers

rO1 || rO 2
rO1 || rO 2

1
gm

83

Example: Source Follower with a Real Current Source


RS 50
Av 0.5
Power 10mW

nCox 100A / V 2
VTH 0.5V

0
VDD 1.8V

Av

RS
1
RS
gm

0.5

1
50
W L 360
gm

CH 16 CMOS Amplifiers

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Output Resistance of Source Follower

Rout

CH 16 CMOS Amplifiers

|| rO || RS
gm

85

Example: Source Follower with Biasing


I D 1mA
Av 0.8

nCox 100A / V 2
VTH 0.5V

0
VDD 1.8V
RG 50k

Av

RS
RS 867
VGS VTH
RS
2I D

VGS VDD I D RS 0.933V


W L 107
CH 16 CMOS Amplifiers

86

Source Follower with Current Source Biasing

In IC technology, source follower is often biased by a current


source to avoid the bias currents dependence on the supply
voltage.
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Summary of MOS Amplifier Topologies

CH 16 CMOS Amplifiers

88

Example: Common Source Stage I

Av g m1
|| rO1 || rO 2 || rO 3
g m3

1
Rout
|| rO1 || rO 2 || rO3
g m3

CH 16 CMOS Amplifiers

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Example: Common Source Stage II

rO 2
Av
1
1

|| rO 3
g m1 g m 3

CH 16 CMOS Amplifiers

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Example: CS and CG Stages

AvCS g m 2 1 g m1rO1 RS rO1 || rO1


AvCG

CH 16 CMOS Amplifiers

rO 2
1
RS
g m1
91

Example: Composite Stage I

Av

CH 16 CMOS Amplifiers

RD
1
1

g m1 g m 2

92

Example: Composite Stage II

1
|| rO 2
gm2

vout1

1
1
vin
|| rO 2
gm2
g m1
vout 2
vin

CH 16 CMOS Amplifiers

1
|| rO 3 || rO 4
g m3

1
1

|| rO 2
g m1 g m 2

93

Chapter Summary
The impedances looking into the gate, drain, and source of a
MOS are equal to , rO and 1/gm respectively (under proper
conditions).
The transistor has to be properly biased before small-signal
can be applied.
Resistive path between the supply rails establishes the gate
bias voltage.
Only three amplifiers topologies are possible.
CS stage provides moderate AV, high Rin and moderate Rout.
Source degeneration improves linearity but lower AV.
Source degeneration raises the Rout of CS stage considerably.
CG stage provides moderate AV, low Rin and moderate Rout.
AV for CS and CG stages are similar but for a sign.
Source follower provides AV less than 1, high Rin and low Rout,
serving as a good voltage buffer.
CH 16 CMOS Amplifiers

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