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01/24/15
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J. Chen
Content
Physical
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Introduction to FET
FET: Field
Effect Transistor
There are two types
MOSFET is
IGFET.
Quite small
Simple manufacturing process
Low power consumption
Widely used in VLSI circuits(>800 million on a single IC chip)
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Oxide
Gate(G)
(SiO2)
n+
Drain(D)
Metal
Channel area
n+
p-type Semiconductor
Substrate (Body)
Body(B)
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Cross-section
view
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Classification of FET
According
MOSFET
N channel
P channel
Enhancement type
Depletion type
Enhancement type
Depletion type
JFET
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P channel
N channel
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12
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Pinched-off channel
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the vGS
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Increasing
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p channel device
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p channel device
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Current-voltage characteristics
Circuit
symbol
Output characteristic curves
Channel length modulation
Characteristics of p channel device
Body effect
Temperature effects and Breakdown Region
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Circuit symbol
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Cutoff region
Biased voltage
vGS Vt
The transistor is turned off.
iD 0
Operating in cutoff region as a switch.
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Triode region
Biased voltage
vGS Vt
v DS vGS Vt
iD k n '
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1
2
(
v
V
)
v
v
t
DS
DS
GS
2
(vGS Vt )vDS
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Triode region
Assuming that the draint-source voltage is
sufficiently small, the MOS operates as a linear
resistance
rDS
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v DS
iD
1
vGS VGS
W
kn '
VOV
L
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W
kn '
(VGS Vt )
L
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Saturation region
Biased voltage
vGS Vt
v DS vGS Vt
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Saturation region
The iDvGS characteristic for
an enhancement-type NMOS
transistor in saturation
Vt = 1 V, kn W/L = 1.0
mA/V2
Square law of iDvGS
characteristic curve.
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v
DS
vGS const .
1
VA
I D
ID
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The
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breakdown
Punched-through
Gate oxide breakdown
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MOS
RGS(DC)
MOS
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MOS
MOS
MOS
MOS
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MOS
MOS
MOS
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DC analysis
Biasing in MOS amplifier circuit and basic
configuration
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2.
3.
4.
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DC analysis
5. Checking
i.
ii.
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Examples of DC analysis
The NMOS transistor is
operating in the saturation
region due to
Vt 2V
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VGD Vt
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Examples of DC analysis
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vi
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Time
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Homework
April
2, 2008:
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biasing scheme
Current-source
biasing
scheme
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Implementing a constant-current
source using a current mirror
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ac characteristic
Definition of transconductance
Small-signal
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model
Hybrid model
T model
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v gs 2(VGS Vt )
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vGS VGS
W
k n ' VOV
L
transconductance
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vDS
ro
iD
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iD I D
VA
ID
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An alternative representation
of the T model
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Characteristic parameters
Three configurations
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Common-source configuration
Common-drain configuration
Common-gate configuration
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Definitions
Rin
vi
ii
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Avo
vo
Av
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vo
vi
RL
RL
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Definitions
Ais
i
Ai o
ii
io
ii
RL 0
Gm
v0
Open-circuit overall voltage gain Gvo
vsig
v0
G
Output resistance
out
ix v 0
sig
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io
vi
RL
RL 0
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Relationships
Voltage
divided coefficient
vi
Rin
Rin
RL
Gv
Avo
vsig Rin Rsig
Rin Rsig
RL Ro
RL
Av Avo
RL Ro
Ri
Gvo
Avo
Ri Rsig
Avo Gm Ro
RL
Gv Gvo
RL Rout
Hence
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Characteristics of CS amplifier
Input
resistance
Rin RG
Av g m (ro // RD // RL )
Voltage
gain
Overall
voltage gain Gv
Output
resistance
Rout ro // RD
Summary of CS amplifier
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RG
g m ( RD // RL // ro )
RG Rsig
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Voltage gain
Av
g m ( RD // RL )
1 g m RS
RG
g m ( RD // RL )
Gv
RG Rsig 1 g m RS
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The CG amplifier
A small-signal equivalent
circuit
T model is used in
preference to the model
Ro is neglecting
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Voltage gain
Av g m ( RD // RL )
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Summary of CG amplifier
Noninverting
amplifier
Low input resistance
Relatively high output resistance
Current follower
Superior high-frequency performance
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RG
ro // RL
Gv
1
RG Rsig r // R 1
o
L
gm
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Including
The
Source
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capacitances
Triode region
Saturation region
Cutoff region
Overlap capacitance
High-frequency
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model
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C gd 0
C gb WLCox
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Overlap capacitance
Overlap capacitance results from the fact that the source and
drain diffusions extend slightly under the gate oxide.
The expression for overlap capacitance C WL C
ov
ov ox
Typical value Lov 0.05 0.1L
This additional
component should be
added to Cgs and Cgd in all
preceding formulas
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C sb 0
V
1 SB
Vo
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C db 0
V
1 DB
Vo
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High-frequency model
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High-frequency model
The equivalent circuit for the
case in which the source is
connected to the substrate
(body)
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gain
Io
gm
I i s (C gs C gd )
Unity-gain
frequency
gm
fT
2 (C gs C gd )
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structure
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Characteristic curves
W
iD k n ' vGS Vt ) 2
L
1
2
I DSS 12 k n '
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W 2
Vt
L
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N-channel
n-type
Semiconductor
S
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G
S
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P+
P+
UGS = 0
P+
P+
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UGS < 0
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UGS = UGS(off)
90
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Diode,
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Field
Effect Transistor
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As
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Homework
April
5.25
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6, 2010:
SJTU
J. Chen