X86

Session_14

Protected mode
operations in 286 &
386
contd.
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80386 Real Mode

Upon reset or power - up , the 80386
operates in real mode
In this mode,it can access all the 8086
registers along with the 80386 32 -bit
registers
Instructions can refer to AL,AH,AX or EAX
Physical address is calculated with the
segment base , offset mechanism

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80386 Real Mode

Uses address space 00000 - 003FF for the
IVT
It has a set of debug registers
A software debugger can load breakpoint
addresses in these registers

Control registers CR0 - CR3 are used and the

lower 16 bits of CR0 correspond to machine
Status word of 80286
CR1 is reserved ; CR2 and CR3 are used for
paging mode

Linear addresses are the physical addresses

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Real Mode

(Contd)

Uses a combination of:

16-bit segment registers (CS, DS, ES, FS,
GS, SS)
16-bit offsets (depends on addressing
modes)
Effective addresses are 20 bit
15
0
Segm
That's
1MB
address
space
(with
a 16-bit
xxxx xxxx xxxx xxxx 0000
ent
processor!)
+
15
0
Offset
0000 xxxx xxxx xxxx xxxx
=
19
0
Physical
xxxx xxxx xxxx xxxx xxxx
Address
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Overcoming the 1MB Limitation

Solutions:
Extended memory (adding normal
memory)
Expanded memory (memory banks)
Not transparent:
Requires drivers (HIMEM.SYS, etc.)
DOS extenders
Custom tricks, etc.
Application programmers' life is tough:
Data structure size often limited to 64KB
Performance penalty
Bugs, bugs and bugs...

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Real Mode Pros and Cons

Pros
16-bit
Enough for many embedded applications
Simple
Popular:
MS-DOS
Hardware and related drivers
Portability across the x86 family
Cons:
No protection (bugs are usually fatal)
Hard to perform thorough tests
CPU does not assist in finding bugs
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386 -Protected Mode

386 is switched from real mode to
protected mode by setting the LSB
of the CR0 register
Increases the linear space to 4GB
and permits the execution of virtual
memory programs of 64 tetra bytes
(2^46 bytes)

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386 -Protected Mode

Can run all existing 8086 and 80286
programs with on-chip memory
management and protection
features
Includes new instructions to support
multitasking multiuser operating
systems

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80386 Protected Mode

32-bit Offset

L o g ical A d d ress
Se lec to r

P h y sic al
M em o ry

O ff set
L im it

D esc rip to r

L in ear
A d d ress

B ase
A d d ress

O ff set

G D T or L D T
32-bit Address

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Descriptor Table
Two types of descriptor tables
global consisting of
segment descriptors for the OS
segment
segment descriptors for the user tasks

and others

local descriptor table for each task

Tasks share a GDT and the

memory area defined in it
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10

How Protection Works

Each time a task loads a segment register,
the CPU performs many checks
if the descriptor table indexed contains a valid
descriptor
if the segment descriptor is of the right type
to be loaded into the specified segment
register cache
For e.g. a descriptor for a read only data segment
cannot be loaded into the SS register

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How Protection Works

User tasks are protected from one
another by providing individual LDTs
System software ,such as the OS
kernel,is protected by
making the code segments only
executable
By having different privilege levels
OS kernel having the highest priority level
0,system services such as BIOS procedures at
1,custom device drivers at 2,application
programs and user tasks at the lowest level

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12

How Protection Works

The descriptor privilege level is referred
as the DPL
The privilege level of an executing task is
the current privilege level CPL
The privilege level encoded when a
program needs to access a data
segment,is requesting privilege level RPL
A task cannot directly access a segment
that has a higher DPL
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13

Call Gates
A gate is a special type of descriptor
put in the GDT or in an LDT
When a program calls a procedure in
another segment,the selector for the
segments call gate is put in the CS
register and the call gate descriptor
in the hidden part of the CS
This indirect access through the call
gate does another privilege check
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Paging Memory Model

Segments broken up into a series of
4KB pages for faster swapping
T a sk A

T a sk B

T a sk B
T a sk A
T a sk B
T a sk A
T a sk B

D isk s

V irtu a l M em o ry

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P h y sic al
M em o ry

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