Académique Documents
Professionnel Documents
Culture Documents
Peter R. Wihl
(former Guest Lecturer)
Overview
Execution Flow
A diagram that describes the major steps in the
sequential software flow.
Illustrates each logical step and decision point in
the overall design of the software.
Provides a starting point for the design of the
software.
Is to embedded software as logical architecture is
to hardware.
Is mapped later to Routines, Functions or Objects
Role of Microcontroller
Data Throughput in SW
What is synchronous data flow?
Data arrives at regular intervals
Polling
Interrupt triggered (blocking)
Interrupt triggered (non-blocking)
Event driven
Often referred to as interrupt driven
Sample Problem
Need to receive 16 bytes into a buffer and
then process the buffer
Bytes arrive asynchronously
Polling Overview
Polling
main
do forever
count = 0
while count < 16
while byte not ready
nop
get byte
buffer[count] = byte
incr count
process buffer
Interrupt Triggered
(Blocking)
interrupt rx_byte
disable interrupts
count = 0
while count < 16
get byte
buffer[count] = byte
incr count
process buffer
enable interrupts
return
main
enable interrupts
do forever
nop
Interrupt Triggered
(Non-blocking)
interrupt rx_byte
if count < 16
get byte
buffer[count] = byte
incr count
else if count = 16
process buffer
count = 0
return
main
count = 0
enable interrupts
do forever
nop
Event Driven
interrupt rx_byte
if count < 16
get byte
buffer[count] = byte
incr count
return
main
count = 0
enable interrupts
do forever
if count = 16
process buffer
count = 0
Real Time
Hard real time
Absolute deterministic response to an
event
Overview
Polling
Interrupt triggered (blocking)
Interrupt triggered (non-blocking)
Event driven
Often referred to as interrupt driven
Sample Problem
Need to receive 16 bytes into a buffer and
then process the buffer
Bytes arrive asynchronously
Polling
main
do forever
count = 0
while count < 16
while byte not ready
nop
get byte
buffer[count] = byte
incr count
process buffer
Interrupt Triggered
(Blocking)
interrupt rx_byte
disable interrupts
count = 0
while count < 16
get byte
buffer[count] = byte
incr count
process buffer
enable interrupts
return
main
enable interrupts
do forever
nop
Interrupt Triggered
(Non-blocking)
interrupt rx_byte
if count < 16
get byte
buffer[count] = byte
incr count
else if count = 16
process buffer
count = 0
return
main
count = 0
enable interrupts
do forever
nop
Event Driven
interrupt rx_byte
if count < 16
get byte
buffer[count] = byte
incr count
return
main
count = 0
enable interrupts
do forever
if count = 16
process buffer
count = 0
Real Time
Hard real time
Absolute deterministic response to an
event
Trick Questions
Which is better, hard or soft real time?
Which design methods are hard real time?
Which design methods are soft real time?
Communication Protocols
What is a communication protocol?
An established set of conventions by which
multiple systems exchange data
Sample Protocol
Byte
Data
Synchronization
Payload size
22+size Payload
2+size+1
Packet checksum
Protocol Interrupt
interrupt rx_byte
get byte
checksum = byte checksum
switch (state)
SYNC
if byte = sync
checksum = byte
state = SIZE
SIZE
size = byte
if size > 0
count = 0
state = PAYLOAD
else
state = CHECKSUM
PAYLOAD
buffer[count] = byte
incr count
if count = size
state = CHECKSUM
CHECKSUM
if checksum = 0
state = ACCEPT
else
state = SYNC
ACCEPT
drop byte
return
Protocol Main
main
state = SYNC
enable interrupts
do forever
if state = ACCEPT
process buffer
state = SYNC
Requirements Analysis
Architecture
Design
Implementation
Module Testing
Design Validation Testing
Example Problem
I want to build a Heads Up Display for my
car.
I would like to see both my engine RPM
and fuel economy on my windshield.
My car has a serial diagnostic interface that
provides this data.
Requirements
System shall have a Heads Up Display
(HUD)
System shall interface with vehicles
onboard diagnostic system
HUD shall display current RPM
HUD shall display current fuel economy
(MPG)
Hardware Constraints
Heads Up Display
256x128 pixels
Full display must be calculated and mirrored
Operates at 115,200 bps
Processor Requirements
Processor shall have 2 UARTs
1. Vehicles onboard diagnostic system
2. Heads Up Display
Hardware Design
Vehicle
data
Processor /
microcontroller
Heads Up
Display
Software Architecture
Vehicle
data
Vehicle data
interface
RPM data
MPG data
RPM data
formatting
MPG data
formatting
RPM text
MPG text
Display processing
Display image
Display control
interface
Heads Up
Display
Software Design
Modules
Software Design
Modules
Main/Initialization
Receive block
Send wake up
signal
Data block
Data type?
RPM
MPG
RPM data
MPG data
Timer
rx_state = ACCEPT
return
extract_data
if data type = RPM
extract RPM data
rpm_format(data)
else if data type = MPG
extract MPG data
mpg_format(data)
return
main
do forever
if rx_state = ACCEPT
extract_data
rx_state = SYNC
main
do forever
if wakeup = 1
tx_wakeup
wakeup = 0
Integer to text
conversion
Text formatting
Integer to floating
point conversion
Floating point to
text conversion
Text formatting
Display Processing
Formatted RPM text
RPM image
generation
MPG image
generation
RPM image
MPG image
RPM placement
MPG placement
Placed RPM
Placed MPG
Display image
generation
Display image
Mirror image
Image to
command
conversion
Display command
Command send
Test Plan
1. Test functionality of every module
2. Test functionality of every module
interaction
3. Test functionality of the final system
Implementation
Module Testing
Simple implementations to test a single
module or module interaction
Total testing code will often be larger than
the actual systems code base
Is this good or bad?