INTRODUCTION TO THE

MICROPROCESSOR
AND COMPUTER

HISTORY OF MICROPROCESSORS
NAME

DATE

TRANSISTORS

MICRONS

CLOCK
SPEED

DATA
WIDTH

MIPS

8080

1974

6,000

2Mhz

8 bits

0.64

8088

1979

29,000

5Mhz

16 bits
8-bit bus

0.33

80286

1982

134,000

1.5

6Mhz

16 bits

80386

1985

275,000

1.5

16Mhz

32 bits

80486

1989

1,200,000

25Mhz

32 bits

20

Pentium

1993

3,1000,000

0.8

60Mhz

32 bits
64-bit bus

100

Pentium II

1997

7,500,000

0.35

233Mhz

32 bits
64-bit bus

~300

Pentium III

1999

9,500,000

0.25

450Mhz

32 bits
64-bit bus

~510

Pentium 4

2000

42,000,000

0.18

1.5Ghz

32 bits
64-bit bus

~1,700

Pentium 4
Prescott

2004

125,000,000

0.09

3.6Ghz

32 bits
64-bit bus

~7,000

The Memory and I/O System

BUSES
MEMORY
SYSTEM

Dynamic RAM
(DRAM)
Static RAM
(SRAM)
Cache
Read-only
(ROM)
Flash Memory
(EEPROM)

MICROPROCESSOR

I/O SYTEM

8086
8088
80186
80188
80286
80386
80486
Pentium
Pentium II
Pentium III
Pentium IV

Printer
Serial
Communication
Floppy disk drive
Hard Disk Drive
Mouse
CD-ROM Drive
Keyboard
Plotter
Monitor
Tape Backup
Scanner
DVD
Camera

The Memory Map of a

Personal Computer
15M bytes in the
80286 or 80386SX
31M bytes in the
80386SL/SLC
63M bytes in the
80386EX
4095M bytes in the
80386DX, 80486,
and Pentium
64G bytes in the
Pentium Pro, Pentium
II, Pentium III,
Pentium 4, and
Core2 5 Mbytes in

Extended Memory
System Area
(384 Kbytes)
Transient Program Area
(640KBytes)

1 Mbytes of Real
Memory
(Conventional
Memory)

The Memory Map of the TPA

9FFFF

MSDOS program

9FFF0

Free TPA
.
.
.

08E30

COMMAND.COM

08490

Device drivers
such as MOUSE.SYS

02530

MSDOS program

01160

IO.SYS program

00700

DOS communications area

00500

BIOS communications area

00400

Interrupt vectors

00000

TPA consists of

The Microprocessor

sometimes referred to as the CPU

(central processing unit)

controls memory and I/O through a

series of connections called buses.

Memory and I/O are controlled through

instructions that are stored in the
memory and executed by the
microprocessor.

The block diagram showing the address, data,

and control bus structure.
Address Bus
Data Bus
p
MRDC
MWTC
IORC
IOWC

ROM

RAM

Keyboard

Printer

The Intel Family of Microprocessor Bus and

Memory sizes
Microprocessor

Data Bus Width

Addre64ss Bus
Width

Memory Size

8086

16

20

1M

8088

20

1M

80186

16

20

1M

80188

20

1M

80286

16

24

16M

80386 SX

16

24

16M

80386 DX

32

32

4G

80386 EX

16

26

64M

80486

32

32

4G

Pentium

64

32

4G

Pentium Overdrive

32

32

4G

Pentium Pro

64

32

4G

Pentium Pro

64

36

64G

Pentium II

64

32

4G

Pentium II

64

36

64G

Memory Interface
Memory Pin Connections:
Pin connections common to all
memory devices are the address
inputs, data outputs or input/
outputs, some type of selection
input, and at least one control input
used to select a read or write
operation.

Address
Write
Read
Select

O/I

PIN
CONFIGURATION
PIN NAMES

The timing diagram of AC characteristics of the

2716 EPROM:

ADDRESS

CS

Data Out Valid

Address multiplexer for the TMS4464 DRAM.

1A
1B
2A
2B
3A
3B
4A
4B

7
4
1
5
7

1Y
2Y
3Y
4Y

RAS
1A
1B
2A
2B
3A
3B
4A
4B

7
4
1
5
7

1Y
2Y
3Y
4Y

Memory sizes

Sample SIMM (Single In Line Memory

Module)

A simple NAND gate decoder that selects a 2716 EPROM for

memory location FF800HFFFFFH.

8088
Address
Bus

8088
Data Bus

2716

CS

OE

RD

IO/M

The 74LS138 3-to-8 line decoder

and function table.

A circuit that uses eight 2764 EPROMs for a 64K 8

section of memory in an 8088 microprocessor-based
system. The addresses selected in this circuit are
F0000HFFFFFH.

The pin-out of the 74LS139, dual 2-to-4

line decoder.

Selection
Inputs

1A
1B

Enable Input

1E

Selection
Inputs

2A
2B

1Y0
1Y1
1Y2
1Y3

2Y0
2Y1
2Y2

Enable Input

2E

Outputs

2Y3

Outputs

Truth table of the 74LS139,

dual 2-to-4 line decoder.
INPUTS

OUTPUTS

Y0

Y1

Y2

Y3