Vous êtes sur la page 1sur 53

ZXG10 iBSC Introduction

Contents

General Introduction

Hardware Architecture

System Principle

Connectivity and signal flow

Summary

All-IP Enhanced iBSC Physical Indices


Physical Indices
Index

ZTE

Dimension (H*D*W) (mm)

2,000 * 800 * 600

Weight

<270Kg(1 rack)
<540Kg(2 rack)

Power Consumption
(All IP Enhance iBSC )

ALL E1:
2,558W/1 rack, 3,868W/2 rack
ALL IP:
2,542W/1 rack,3,808W/2 rack

Power Supply

-48VDC (-40VDC ~ -57VDC)

Working Temperature

Long-term:0C~40C.
Short-term: <-5C~45<C.

Relative Humidity

Long-term: 20%~90%.
Short-term: 5%~95%.

ZTE Large-Capacity iBSC


Most Powerful Processing Capability
Item Description
BHCA
Maximum voice traffic Erl
Number of Support TRX

ZTE
4200K
15000Erl
3,072

All-IP architecture, meet IP evolution trend

Powerful processing capacity

Support E1/T1/STM-1/IP interface, flexible network building

Interface Types of ZXG10 iBSC


No.

Logic Interface

Connected NE

Physical Interface Type

1.

MSC

STM-1,E1,FE/GE

2.

Gb

SGSN

3.

Abis

BTS

E1, STM-1, FE/GE

4.

Ater

iTC

STM-1 E1

E1,FE/GE

Contents

General Introduction

Hardware

Architecture

System Principle

Connectivity and signal flow

Summary

iBSC Structure - Shelves


Control Shelf (BCTC)
System

global operation & maintenance

Control

plane processing

Control

plane Ethernet switching

Resource Shelf (BGSN)


System

access

Service

processing subsystem

Switch Shelf (BPSN)


Large-capacity

non-blocking IP switching platform

BACKPLANE OF CONTROL CENTER (BCTC) :Control shelf is the control core of ZTE BSC which manage and
control the whole system, process control signaling, perform
operation and maintenance, and provide global clock for external
synchronization function. Each BSC must be configured with one
control shelf.
BACKPLANE GIGA UNIVERSAL SERVICE NETWORK(BGSN) :Resource shelf hold various services processing board for system
access. It can be configured with Abis interface unit, Ater
interface
unit, A-interface unit.
BACKPLANE OF PACKET SWITCHING NETWORK (BPSN):Packet shelf provide the IP switching function for all user plane
signal with high speed link.

Contents

General Introduction

Hardware Architecture

System

Principle

Connectivity and signal flow

Summary

iBSC System Architecture


DTB
SDTB
SPB

OMP
CLKG
SBCX

U
I
M
C

GUP
EIPI
Resource
Shelf

CHUB

GLI

CMP

G
U
I
M

Control Flow
Data Flow

GLI
Control
Shelf

P
S
N

UIMC
Switching
Shelf

DTB
SDTB
SPB

G
U
I
M

GUP
Resource
Shelf

iBSC Shelf - BCTC


Main BCTC boards layout:
(Global boards include SBCX, OMP, ICM,
CHUB are configured in the main BCTC)

Normal BCTC boards layout:


Board
Name

Full Name

OMP

Operation and Maintenance


Processing Board

1 pair per BCTC

Provide global processing and controls


O&M of the whole system (including O&M
agent)

1+1

CMP

Control Main Processing


Board

Depends on the configuration


capacity.

Provide connection with the switching unit


of control plane, implementing all the
protocol processing on control plane

1+1

Control Plane HUB

1 pair per iBSC

Center where the control flows of BPSN,


BGSN, and BCTC gather

1+1

Integrated Clock Module

1 pair per iBSC

Provide system clock

1+1

UIMC

Universal Interface Module


for Control plane

1 pair per BCTC

Signaling switching center of the BCTC

1+1

SBCX

X86 Single Board


Computer

2 per iBSC

Provide OMM function

1+1

CHUB
ICM

Configuration Principle

Functions

Backup

UNIVERSAL INTERFACE MODULE FOR


CONTROL PLANE(UIMC 1+1) :
Provide Ethernet switching in the control shelf,
and manage the control shelf.
Provide internal user plane GE interface to
cascade UIMC with CHUB in control self.
Provide the clock driven function in the control
shelf.
The external data from other boards enters the
UIMC for switching and it sent to the target
board.

CONTROL PLANE HUB (CHUB 1+1):


CHUB along with UIMC/UIMU/GUIM is extend the
data flow of the system control plane in I BSC.
Exchange of control signal within all the shelf.
The data of control plane from all the shelves
are sent to Ethernet switching unit on CHUB.
The data is then sent to the UIMC through the
internal GE interface and the distribute to the
Resource Control Boards (RCB) and vice versa.

OPERATION AND MAINTENANCE


PROCESSING UNIT (OMP 1+1) :
Implement all the operation and maintenance
process, monitor and manage the boards.
It connects with OMM through 100Mbps of
Ethernet.
In OMP there are 2 CPU
CPU-A having hard disk of 40G basically for O&M
processing.
CPU-B also known as Routing Process Unit (RPU)
used for call
routing protocol.

CLOCK GENERATOR BOARD (CLKG


1+1) :
Provide system clock and external synchronization.
It extract clock reference through A-interface and
give multiple timing reference signal to the
interface unit.
Perform clock loss alarming and deterioration
judgment for the interrupted reference
Provide active/standby switching.
Clock o/p after balance-driven then distributed to
UIMU/GUIM through system clock cable and to UIMC
through the backplane PCB.

SYSTEM CLOCK CABLE :

X86 SINGLE BOARD COMPUTER (SBCX


1+1):
SBCX is basically a server which work as
memory controller and main storage unit. All
the dates and their s/w for all the interface unit
with OMP data processing are stored in this
main storage unit.
Provide 3 FE interface, 2 GE interface, USB
interface also having peripheral device
interface like Keyboard and mouse.
SBCX have CPU with controller and having two
hard disk of 80G for data storage.

CONTROL MAIN PROCESSING BOARD


(CMP 1+1) :

Implement Packet Switching and Circuit


Switching, services control management and
resource management.

There are independent two CPU on the board,


CPU_A and CPU_B. Each CPU provide control
plane FE interface, with FE interface for
communication of active /standby, and
RS232/485 serial port for the communication
with other unit.

CPU_A is the main control function of the board.

ZTE BSC having maximum carrier capacity of 2048


trx with max traffic of 15000 Erlang.
One CMP board capacity is 5000 Erlang.
CMP board require for 15000 Erlang traffic = 3
(15000/5000)
Total 3 CMP board require for 15000Er traffic with 3
redundant (1+1), so total of 6 CMP boards.

Intra-Shelf Connection BCTC

iBSC Shelf - BGSN


Main BGSN boards layout:
(Global boards include GIPI,GUP2,
SPB2,DTB,SDTB2 are configured in the
main BGSN)

Normal BGSN boards layout:

Board Name
GUIM
GIPI

GUP2

DTB

Full Name

Configuration
Principle

Functions

Backup

GE Universal
Interface Module

1 pair per BGSN

Used for BGSN interface shelf internal


switching

1+1

Gigabit IP Interface

Provide 1 GE or 4 FE

Provide GE/FE interface

1+1

GSM Universal
Processing 2

Any slot except slots


9, 10, 1, and 17

Abis Interface Processing Board 2(BIPB2)


, A-Interface Processing Board (AIPB) ,
User Plane Processing Board 2(UPPB2) ,
Dual Rate Transcoder Board 2(DRTB2)

Digital Trunk Board

Provide 32 E1
interfaces

Provide E1 interfaces.

iBSC Shelf - BGSN


Board Name
SDTB2

SPB2

EIPI

Full Name

Configuration Principle

Functions

Backup

SONET Digital
Trunk Board 2

Provides 2 STM-1
interfaces

Used for access channelized STM-1


interface

1+1

Signaling
Processing Board
2

Provides 16 E1
interfaces

LAPD processing board 2 (LAPD2),


signaling processing board 2 (SPB2),
and Gb interface processing board 2
(GIPB2)

Every 2 DTB with 1 EIPI.

Provides E1/T1-based IP access,


which is realized by EIPI working
together with DTB

E1 IP Interface

GIGABIT UNIVERSAL INTERFACE


MODULE (GUIM 1+1)
Provide control plane and user plane Ethernet
switching in gigabit resource shelf, circuit
domain timeslot switching, gigabit resource shelf
management, also provide external interface for
shelf.
Provide clock driving function to all boards in
gigabit resource shelf.
The external data from the boards of the shelf
enter to Ethernet switching and TS switching
domain for switching and is then sent to the
destination board.

SONET DIGITAL TRUNK BOARD (SDTB2


1+1) :
Provide two 155Mbps STM-1 interface.
Provide an access processing capacity of 126E1.
It receives the clock from the system clock board
and provide the reference clock signal to the
STM-1 for the synchronization.
It receives the STM-1 optical data from line side
and then sent to the circuit switching for the
switching, from where it sent to GUIM board and
vice versa.

One SDTB2 can support


(2xSTM-1).

= 126E1 Abis interface

Abis E1 require for 2048 TRX BSC = 170E1(2048trx/12trx per E1).


= 340E1 for Abis
Protection(170x2).

STDB2 requirement for BSC


2.7).

= 3 (340/126 E1 per STDB2 =

STDB2 with 1+1 redundancy

= 3x2 = 6 No. of Board.

E1 IP INTERFACE BOARD (EIPI 1+0) :


EIPI board provides E1 based IP access. It is
basically E1 to IP payload and vice versa. It works
together with SDTB2 board, two EIPI boards are
connected with one SDTB2 board to provide 2 x
63E1 interface.
The interface unit access HW data, and sends the
data to HSP sub card. After being processed by HSP
protocol, the data is sent to service processing unit
where it get distributed to user plane and control
plane. The user plane data is sent to GUP2 for
processing via user plane switching network and
the control plane data is sent to CMP for processing
via control plane switching network.

One EIPI board have capacity of 63E1 interface.


EIPI board works together with SDTB2 board for the E1
to IP payload and vice versa.
One SDTB2 board have 2x STM-1 i.e (63E1x2 = 126E1)
So to support one SDTB2 board we require two EIPI
board i.e (2x63E1 interface = 126E1 interface for E1 to
IP payload and vice versa).

GSM UNIVERSAL PROCESSING BOARD


(GUP2 1+0)- LOGICAL NAME (BIPB2):

GUP2 board logically can be used in different


ways, if we are using in process of Abis then
its logical name is ABIS INTERFACE
PROCESSING BOARD (BIPB2).

At STM-1 interface or E1 interface, the CS and


PS service from BTS are switched through
circuit switching network of GUIM board. The
20ms TRU frames or (PD frame) are found out
and it converts into IP packets and then sent
to the target board through GUIM.

GUP2 when used as BIPB2


Processor)

= 15 DSP (Digital Signal


Capacity of each DSP = 28

TRX.
TRX capacity of one BIPB2 board = 420 TRX (15DSP x 28 TRX).
Total TRX capacity of BSC

= 2048 TRX.

BIPB2 board require in BSC

= 5 ( 2048TRX/420TRX = 4.8).

So, number of BIPB2 board in BSC is 5 with 1+0. Redundancy


can be possible with expansion.

GSM UNIVERSAL PROCESSING BOARD


(GUP2 1+0)- LOGICAL NAME (TIPB2):

GUP2 board logically can be used in different


ways, if we are using in process of Ater then its
logical name is ATER INTERFACE
PROCESSING BOARD (TIPB2).

When used as TIPB2, the user plane data from


GUIM is given to DSP through Ethernet switching
unit, convert to TDM data and then sent to
target board through circuit switching.

GUP2 when used as TIPB2

= 15 DSP (Digital Signal Processor)


Capacity of each DSP = 992 TCH.
TCH capacity of one TIPB2 board = 14880 TCH (15DSP x 992TCH).
Number of sites with 2048 TRX
= 170 Sites ( 2048TRX/12TRX)
Assuming 4+4+4 configuration.
One 2048 TRX BSC
= 11730 Full Rate TCH (170Sites x 69TS)
Assuming normal condition, one site
= 69TCH{96TS-3[6PDCH(3Fix+3Sw) + 1BCCH(1TS) + 2SDCCH(2TS)]}.
Assuming 30% AMR HR = 15249 FR+HR TCH (11730 + 3519).
Assuming 80% utilization of BSC = 12200 FR + HR TCH.
GUP2(TIPB2) require
= 1Nos. (12200TCH/14880TCH= 0.9)
So number of TIPB2 board in BSC with 1+1 redundancy = 2 Nos.

SDTB2(Ater) board is used with GUP2(TIPB2) to process TCH


on Ater interface.
One SDTB2 can support
= 2 STM-1 (Optical).
SDTB2 can support
= 15120 channels of
16kbps on Ater
IF (2 x 63E1 x 30 x 4).
GUP2(TIPB2) traffic capacity
= 14880 TCH.
SDTB2 board require
(14880TCH/15120TCS=0.9)

= 1 Nos.

So, number of SDTB2 board require with 1+1 redundancy = 2


Nos.

GSM UNIVERSAL PROCESSING BOARD


(GUP2 1+0)- LOGICAL NAME (UPPB2):
GUP2 board logically can be used in different ways,
if we are using in process of Gb then its logical
name is USER PLANE PROCESSING BOARD
(UPPB2).
When used as UPPB2, the user plane data from
GUIM board access the FE/GE interface and then it
is given to DSP through Ethernet switching unit.DSP
perform some user plane processing and then
switches the data to SPB2 board through user
plane GE interface.

GUP2 when used as UPPB2

= 600 Cells (15DSP x 40 Cells).


Capacity of each DSP = 40 Cells.
GUP2(UPPB2) can support
= 3600 PDCH Simultaneously.
[600Cells x 6(3Fix + 3Sw)].
One 2048 TRX capacity BSC
= 170 sites(2048TRX/12TRX).
Assuming 4+4+4 configuration.
170 Sites per BSC
= 510 Sector ( 170sitesx 3sectors/site).
510 Sectors per BSC = 3060 PDCH [ 510Sectors x 6(3Fix + 3Sw)].
GUP2(UPPB2) require per BSC = 1 Nos. (3060/3600PDCH = 0.9).
So, number of GUP2(UPPB2) require with 1+1 redundancy = 2 Nos.

SIGNALING PROCESSING BOARD (SPB2


1+0):
SPB2 board can be used for LAPD processing board.
LAPD signal from BTS is access by SDTB2 board and
switched to LAPD board through the circuit
switching network on UIMC/UIMU or in gigabit
resource shelf through GUIM where it perform LAPD
processing.
When SPB2 is used as signal processing board, it
process MTP2 and X.25 protocol and extract 8k
synchronization clock from the line and transmit it
through cable to the CLKG.
When SPB2 is used as Gb interface processing
board, it perform Gb interface function.
It provide physical 16xE1 external interface.

BSC Gb LINK CALCULATION:


Number of TRX in BSC
Number of Sites in BSC
PDCH for one site

= 2048 TRX
= 137 (2048TRX/15TRX)
Assuming 5+5+5 configuration.
= 18 [3 sector x 6 PDCH(3Fix + 3Sw)].

BW require for PDCH of 1 site = 1152 (18 x 64kbps BW/PDCH TS).


Total BW require for BSC

= 157286(1152BW/site x 137 sites).

E1 require for PDCH BW

= 77(157.29Mbps/2.048Mbps per E1).

Assuming 10% PDCH using simultaneously = 8E1[10% of 77E1(100%)]


E1 requirement can be increase as per the Gb link % utilization observed
at SGSN.(80%).

GE IP INTERFACE BOARD (GIPI 1+1) :

GIPI board provide IP interface between ZTE


iBSC and BTS,SGSN and MSC/MGW. Each
GIPI provide GE interface.

When used for Abis interface it functional


work is Gigabit IP Interface Board (IPBB).

The interface unit access the date and then


it send to service processing unit where the
user plane data is sent to GUP2 for
processing and control plane date is sent to
CMP.

Intra-Shelf Connection BGSN

iBSC Shelf - BPSN


Main BPSN boards layout:
(Global boards include PSN, GLI, CMP
are configured in the main BCTC)

Normal BPSN boards layout:


Board Name

Full Name

Configuration Principle

Functions

Backup

Packet Switching
Network

1 pair per BPSN

Provides data switching among


GLIs

Load
sharing

GLI

Gigabit Line Interface

Every 2 pairs GUIM with 1


pair GLI

Provides physical layer adaptation,


IP packet check, fragmentation,
transfer management, and traffic
management

Load
sharing

CMP

Control Main Processing


Board

Depends on the configuration


capacity.

Provide connection with the


switching unit of control plane,
implementing all the protocol
processing on control plane

1+1

UIMC

Universal Interface
Module for Control plane

1 pair per BPSN

Provides signaling switching in


BPSN

1+1

PSN

GIGABIT LINE INTERFACE BOARD(GLI


1+1) :
GLI is GE interface board which is connected with
GUIM of both the resource shelf.
Implement function such as physical layer adaption, IP
packet check, transfer management and traffic
management.
GLI has a processing capacity of 2.5Gbps for process
and transfer.
Data sent from GUIM through optical fiber to switching
interface is sent to service processing unit and then
sent to PSN for high speed data switching process.

PACKET SWITCHING NETWORK (PSN


1+1):

PSN supports bi-directional user data


switching at the rate of 40Gbps in each
direction.

Implement 1+1 load sharing.

Data from GLI is sent to the matrix switching


unit of PSN through backplane and after
processing the data with high speed again it
sent back to the target GLI board.

Intra-Shelf Connection BPSN

Existing iBSC rack structure

Micros oft Office


Excel 97-2003 Works heet

Contents
General

Introduction

System

Principle

Connectivity
Summary

and signal flow

iBSC - Connection Between Shelves

Clock distribution cable and line clock extracting cable

Control plane Ethernet cable

User plane fiber

Monitoring cable

Clock Extracting and


Distribution
Clock reference
The

ICM board can get the BITS clock reference

or obtain the clock reference from GPS module.

Clock distribution
ICM

> GUIM/UIMC

GUIM/UIMC

> slots of each shelf

Control Plane Ethernet


Connections
Control plane Ethernet interconnection
Realized
CHUB

through CHUB board

< > UIMC in BCTC through the

backplane printed cable


CHUB

< > UIMC in BPSN through Ethernet

cable
CHUB

cable

< > GUIM in BGSN through Ethernet

User Plane Connections

User Plane interconnection


GLI

< > GUIM

Fiber

optic cables are used for the connections

between GLI and GUIMs in BGSN

Monitoring Circuit
Connections
Monitoring of fans
Power

distribution plug-in box < > Fan plug-in

box
Power

distribution plug-in box < > Cabinet-top

fan

Monitoring of PWRD boards


OMP

< > PWRD in power plug-in box

Monitoring
Power

of external environment

distribution plug-in box < > Sensor

Flow in CS Domain - Boards

Flow in PS Domain - Boards

N7 signaling - Boards

THANK
YOU

Vous aimerez peut-être aussi