Académique Documents
Professionnel Documents
Culture Documents
and Architecture
By
Renjith V Ravi
Assistant Professor,
Dept of ECE
INSTRUCTION SETS
INSTRUCTIN FORMATS
The
INSTRUCTIN FORMATS
In assembly language it is
Op X1,X2,..Xn
Eg : Mov A,B
Where op is called the opcode or operation code.
X1,X2,Xn are addresses
address Xi represents a
MOVE D2,D1
MOVE #99,D1
RISC Vs CISC
ADDRESSING MODES
The way in which an operand is specified in an instruction
Or the way in which the processor can access the data
Let X be an operand and V(x) is its value
Let X is reg. B and V(B) =2 then
This value can be specified in different ways such as
Immediate
Direct
mode
mode
Indirect
mode
Register
mode
Immediate mode
Indirect mode
EA = R
Eg : MOVE A,(R0)
The
EA = offset + R
Eg : MOVE 20[R1],R2
The
EA
This
After
Eg : MOVE (R2),+ R0
The
After
Eg
: MOVE R1,-(R0)
This
Finally,
PROGRAMMING CONSIDERATIONS
Most
Assembly
PROGRAMMING CONSIDERATIONS
The
MOVE.L #2001,A0
MOVE.L #$07D1,A0
# indicates immediate value
$ indicates Hexadecimal numb
Here
Assembler Directives
Assembly
eg:
A EQU 2001
tells A = 2001
Or it tells the assembler how to treat the symbol A
These type of non executable assembly language
instructions are called assembler directives or
pseudo instructions
Macro
instruction or macro
Datapath Design
ALU
ALUs
The
The
Word
ALUs
Combinational ALUs
The
They
Combinational ALUs
The
specific operation to be
performed by the desired
subunit is determined by a
select control line S.
The
Can
perform maximum 16
logical operations
Can
perform maximum 16
arithmetic operations
Sequential ALUs
Sequential ALUs
It
is intended to implement
multiplication and division
using one of the sequential
digit-by-digit
shift-andadd/subtract algorithms.
Three
AC
Sequential ALUs
Additional
data processing is
provided by a combinational ALU
capable of addition, subtraction,
and logical operations;
we
MQ register is so-called
because it stores the multiplier
during multiplication and the
quotient during division.
Sequential ALUs
DR
stores the
multiplicand or divisor,
The
result (product or
quotient and remainder)
is stored in the registerpair AC.MQ.
Hardwired control
2.
Hardwired control
Hardwired control
Hardwired control
The
instruction
decoder
decodes the instruction loaded
in the IR. If IR is an 8-bit
register
then
instruction
decoder generates 2^8 , i.e.
256 lines; one for each
instruction.
According
The
Hardwired control
The
It
After
execution of each
instruction end signal is
generated
which
resets
control step counter and
make it ready for generation
of control step for next
instruction.
The
Microprogramming
Microprogramming
The
The
Each
Micro
Each
Its
control
information
extracted in a manner that
resembles the fetching and
execution of a program from
the
computer's
main
memory.
Microinstruction format
The
The
If