THE MICROPROCESSOR

AND ITS
ARCHITECTURE
( REAL MODE )
Micro 133 Prelim Lecture 2
by: Engr. Ricrey E. Marquez, CpE, MSCS

INTRODUCTION

In this lecture presents the microprocessor

as:
a programmable device by observing at
its internal programming model, and
how its addresses can be access in each
memory space

MSDOS MEMORY
MAP

MSDOS Memory Map

IVT (INTERRUPT VECTOR

TABLE)

Contains 256 20-bit addresses

Each address points to a hardware or
software interrupt service routine (ISR)
Used by USER, BIOS and DOS
(MSDOS, BASIC)

BIOS DATA

Used by BIOS for its temporary

space.

BIOS is ROM based and data cannot be

written in ROM.

Information such as keyboard queue,

screen mode and other temporary
variables are stored here

DOS DATA

Used by DOS to store temporary

information like current file-name,
directory name, etc.
Very similar in operation to the BIOS
data work space

RESIDENT DOS

Contains DOS programs such as MS

DOS commands like COPY, DIR, CD,
MD, DEL, REN etc.
Also contains around 200 high level
segments of code that manage the
system
This code remains in memory while the
machine is switched on

USER MEMORY SPACE

About 500 KB of RAM in total, available for use

by a user
Each program has various segments within the
user space (e.g. Code Segment (CS), Data Segment
(DS), Stack Segment (SS), and Extra Segment (ES))

Also includes a 256 byte area for passing

system level parameters called Program
Segment Prefix (PSP)

TRANSIENT DOS

Used by DOS programs that is less

frequently called
Usually reserved for these programs are
format, print, chkdsk, scandsk, etc.

SCREEN (VIDEO) RAM

Primary memory set aside for use by the video
display adaptor
Video RAM is physically located on the video
adaptor but is mapped into primary memory
The full mapping of mono and CGA into RAM
can be supported
Supports EGA, VGA, XGA, or UXGA by
swapping blocks of memory between the display
adaptor and primary memory

EXTENSION ROM SPACE

Used for additional hardware devices

Provides space where routines can be
supplied to initialize and control
unknown hardware (any new device)

USER ROM SPACE

Space provided for users to install any

ROM programs they may want

BASIC ROM SPACE

Early IBM PCs had a BASIC boot up

If a DOS system was not found on any
drive, this ROM was invoked

BIOS SPACE
It is Basic I/O System (BIOS) memory space that are:
Use in routines to check the system hardware during
boot up
Use by the programs that load DOS system files
Use by some routines available to user programs that
perform various functions (BIOS service routines)
These service routines usually service interrupts, but can
be used to control hardware directly, e.g. screen modes,
disk access, etc.

Installed via ROM chips that contains attached

hardware information and initial drivers

INTERNAL MICROPROCESSOR
ARCHITECTURE

Before a program is written or any instruction

investigated, the internal configuration of the
microprocessor must be known.
Programming model of the 8086 through the
Core 2 is considered program visible, because
its registers are used during programming and
specified by the instructions.
Registers which can not be addressable directly
during applications programming but may be
used indirectly during system programming

INTERNAL MICROPROCESSOR
ARCHITECTURE

Figure 1a & Figure 1b illustrates

the programming model of the Intel
8086 through the Core 2
microprocessor.
Some registers are general-purpose
or multipurpose registers, while
some have special purposes.

REGISTERS
Registers hold various data sizes (bytes,
words, or double words) and are used for
almost any purpose as dictated by a
program.
Multi-purpose/General-purpose
Registers
Special-purpose Registers
Segment Registers

MULTI-PURPOSE REGISTERS

MULTI-PURPOSE REGISTERS

MULTI-PURPOSE REGISTERS

SPECIAL-PURPOSE
REGISTERS

Special-purpose Registers include RIP, RSP,

and RFLAGS; and the segment registers
include CS, DS, ES, SS, FS, and GS.
The EFLAG
and FLAG
register counts
for the entire
8086 and
Pentium
microprocessor
family.

SPECIAL-PURPOSE
REGISTERS

SPECIAL-PURPOSE
REGISTERS

SPECIAL-PURPOSE
REGISTERS

SPECIAL-PURPOSE
REGISTERS

SPECIAL-PURPOSE
REGISTERS

SEGMENT REGISTERS

Segment registers are registers used to

generate memory addresses when combined
with other registers in the microprocessor.

SEGMENT REGISTERS

REAL MODE MEMORY

ADDRESSING
Real Mode operation allows the microprocessor to address
only the first 1MB of memory space - even the Pentium
microprocessor.
The first 1M byte of memory is called either the REAL
MEMORY or CONVENTIONAL MEMORY system.
Real Mode operation allows application software written
for the 8088/8086, which contain only 1M byte of
memory, to function in the 80286 and above without
changing the software.
In all cases, each of these microprocessors begins operation
in the real mode by default whenever power is applied or
the microprocessor is RESET.

SEGMENTS AND OFFSETS

Combination of a SEGMENT ADDRESS and an OFFSET
ADDRESS access a memory location in the real mode.
Segment Address (SA) is located within one of the
segment registers, defines the beginning address of any
64
KB
memory
segment.
Offset Address (OA) selects any location within the 64
KB memory segment.

Figure 2
Table 1

SEGMENTS AND OFFSETS

A 20-bit real mode address allows one to access the start of a
segment at any 16-byte boundary within the first 1MB of
memory.

EFFECTIVE/ACTUAL ADDRESS = SEGMENT ADDRESS * 10 +

OFFSET ADDRESS

Any real mode segments can only begin at a 16-byte boundary in

the memory system and this boundary is often called a paragraph.
In the 80286 (with special external circuitry) and the 80386 through
the Pentium Pro, an extra 64 KB minus 16 bytes of memory is
addressable when the segment address is FFFFh, and the
HIMEM.SYS driver is installed in the system.
This area of memory (0FFFF0h-10FFEFh) is referred to as high
memory (HIMEM).

DEFAULT SEGMENT AND

OFFSET REGISTERS

Microprocessors has a set of rules that apply

to segments whenever memory is addressed
These rules, which apply in either the real or
protected mode, define the segment
register and offset register combination used
by certain addressing modes.
Table 2

DEFAULT SEGMENT
AND OFFSET
REGISTERS
Code Segment (CS) register defines the start of
the memory space of the code, and the Instruction
Pointer (IP) locates the next instruction within the
code segment.
Stack data are references through the Stack
Segment (SS) at the memory location addressed by
either the Stack Pointer (SP/ESP) or the Base
Pointer (BP/EBP)
Table 3

DEFAULT SEGMENT AND

OFFSET REGISTERS

One can think of segments as windows that can

be moved over any area of memory to access
data and code
Program can have a lot of segments, but can
only access four (in 8086-80286) or six (in
80386 and above) segments at a time
Figure 4
Figure 5

RELOCATION

Segment and Offset addressing scheme

allows relocation
Relocatable Program - one that can
be placed into any area of memory and
executed without change
Relocatable Data - data that can be
placed in any area of memory and used
without any change to the program

Figure 1a. The programming 8-bit Names model of the 8086 through the Core 2
microprocessor including the 64-bit extensions.

Figure 1b. Flat mode 64-bit access to numbered registers.

Figure 2 The real mode memory-addressing scheme, using a segment address plus an
offset.

Table 1. Example segment addresses

Table 2. 8086-80486 and Pentium-Pentium II default 16-bit

segment and offset address combinations

Table 3. 80386, 80486, Pentium, Pentium Pro, and Pentium

II default 32-bit segment and offset address combinations.

Figure 5. An application program containing a code, data, and stack segment loaded into a DOS system
memory.