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Digital Hierarchy
PDH
MULTIPLEXING
PLESIOCHRONOUS HIGHER
ORDER DIGITAL
MULTIPLEXING
is the
DIGITAL TRANSMISSION
HIERARCHY
Six 44.736 Mbits/s
inputs
Seven 6.312 1
inputs
1
6
T3 MUX
7
Four
1.544Mbits/s
Inputs
1
24
TI MUX
64kb/s
1
4
T2 MUX
1.544 Mb/s
6.312 Mbits/s
T4 MUX
274.176
Mbits/
No.of 64Kb/s
Channels
Japan Mbits/s
0.064
0.064
24
1.544
30
2
3
0.064
1.544
2.048
48
3.152
3.152
96
6.312
6.312
120
8.448
480
34.368
672
44.376
1344
91.053
1440
4
97.728
1920
4032
5760
32.064
139.264
274.176
397.200
PDH MUX
Four primary systems (24-channle each)
Cont--
PDH Europe
64
kbits/s
x30
30 ch
2.048 Mb/s
120 ch
8.44Mb/s
x
4
480 ch
34.368
Mb/s
x4
7680 ch Europe
564.992
Mbit/s
1920 ch
139.264
Mb/s
x4
x4
Interleaving
The multiplexing of several tributaries can
be achieved by either
Bit by bit multiplexing (bit interleaving)
Word by word multiplexing (byte
interleaving)
BIT INTERLEAVING
There are four bit streams to be
Byte Interleaving
Byte interleaving sets some restraints on
PDH features
Bit interleaving is used for North American
PDH Features
BIT INTERLEAVING
BYTE INTERLEAVING
BIT INTERLEAVING
SIMPLIFIED SDH MULTIPLEXING
HIGR ORDER
MULTIPLEXER
Higher
Order
Multiplexer
Frame no: 2
-Stuffing
Control bit
Stuffing
bit is a
data bit
Stuffing bit
is a stuff bit
PDH END
THANKS