Vous êtes sur la page 1sur 26

FIELD EFFECT TRANSISTOR

The Field effect transistor is abbreviated as FET , it is an another semiconductor device like a
BJT which can be used as an amplifier or switch. The Field effect transistor is a voltage
operated device. Whereas Bipolar junction transistor is a current controlled device. Unlike
BJT a FET requires virtually no input current. This gives it an extremely high input resistance ,
which is its most important advantage over a bipolar transistor.
FET is also a three terminal device, labeled as source, drain and gate.
The source can be viewed as BJTs emitter, the drain as collector, and the gate as the counter
part of the base.
The material that connects the source to drain is referred to as the channel.
FET operation depends only on the flow of majority carriers ,therefore they are called uni
polar devices. BJT operation depends on both minority and majority carriers.
As FET has conduction through only majority carriers it is less noisy than BJT.
FETs are much easier to fabricate and are particularly suitable for ICs because they occupy
less space than BJTs.
The performance of FET is relatively unaffected by ambient temperature changes. As it has a
negative temperature coefficient at high current levels, it prevents the FET from thermal
breakdown. The BJT has a positive temperature coefficient at high current levels which leads
to thermal breakdown.

CLASSIFICATION OF FET

There are two major categories of field effect transistors:

1. Junction Field Effect Transistors

2. MOSFETs

These are further sub divided in to P- channel and N-channel devices.

MOSFETs are further classified in to two types Depletion MOSFETs and Enhancement .
MOSFETs

When the channel is of N-type the JFET is referred to as an N-channel JFET ,when the
channel is of P-type the JFET is referred to as P-channel JFET.

Basic Structure

Figure shows the basic structure of an n-channel JFET (junction field-effect transistor).Wire
leads are connected to each end of the n-channel; the drain is at the upper end, and the source
is at the lower end. Two p-type regions are diffused in the n-type material to form a channel,
and both p-type regions are connected to the gate lead.

Basic Operation

Figure shows dc bias voltages applied to an n-channel device. VDD provides a drain-to-source
voltage and supplies current from drain to source. VGG sets the reverse-bias voltage between the
gate and the source, as shown.

The JFET is always operated with the gate-source pn junction reverse-biased. Reverse biasing of
the gate-source junction with a negative gate voltage produces a depletion region along the pn
junction, which extends into the n channel and thus increases its resistance by restricting the
channel width

JFET Symbols

The schematic symbols for both n-channel and p-channel JFETs are shown in Figure the arrow
on the gate points in for n channel and out for p channel

CHARACTERISTICS OF N-CHANNEL JFET


The family of curves that shows the relation between current and voltage are known as
characteristic curves.
There are two important characteristics of a JFET.

Drain or VI Characteristics

Transfer characteristics

Drain Characteristics:Drain characteristics shows the relation between the drain to source voltage Vds and
drain current Id. In order to explain typical drain characteristics let us consider the curve
with Vgs= 0.V. This is produced by shorting the gate to the source, as

in Figure

When Vds is applied and it is increasing the drain current ID also increases linearly up to knee point.
This shows that FET behaves like an ordinary resistor. This region is called as ohmic region.ID
increases with increase in drain to source voltage. Here the drain current is increased slowly as
compared to ohmic region. At point B in Figure , the curve levels off and enters the active region
where ID becomes essentially constant. As VDS increases from point B to point C, the reverse-bias
voltage from gate to drain (VGD) produces a depletion region large enough to offset the increase in
VDS, thus keeping ID relatively constant.

Pinch-Off Voltage

All the drain to source voltage corresponding to point the channel width is reduced to a
minimum value and is known as pinch off. The drain to source voltage at which channel
pinch off occurs is called pinch off voltage(Vp).
For VGS = 0 V, the value of VDS at which ID becomes essentially constant (point B on the
curve in Figure is the pinch-off voltage, VP. For a given JFET, VP has a fixed value. As you
can see, a continued increase in VDS above the pinch off voltage produces an almost constant
drain current.

Breakdown.

As shown in the graph in Figure breakdown occurs at point C when ID begins to increase very
rapidly with any further increase in VDS. Breakdown can result in irreversible damage to the
device, so JFETs are always operated below breakdown and within the active region (constant
current) (between points B and C on the graph).

Why the gate to source junction of a JFET be always reverse biased ?

The gate to source junction of a JFET is never allowed to become forward biased because the
gate material is not designed to handle any significant amount of current. If the junction is
allowed to become forward biased, current is generated through the gate material. This current
may destroy the component. There is one more important characteristic of JFET reverse
biasing i.e. J FET s have extremely high characteristic gate input impedance. This impedance
is typically in the high mega ohm range. With the advantage of extremely high input
impedance it draws no current from the source. The high input impedance of the JFET has led
to its extensive use in integrated circuits. The low current requirements of the component
makes it perfect for use in ICs.

JFET PARAMETERS

The electrical behavior of JFET may be described in terms of certain parameters. Such
parameters are obtained from the characteristic curves.

A C Drain resistance(rd)

It is also called dynamic drain resistance and is the a.c.resistance between the drain and
source terminal, when the JFET is operating in the pinch off or saturation region.It is
given by the ratio of small change in drain to source voltage V ds to the corresponding
change in drain current Id for a constant gate to source voltage Vgs.
Mathematically it is expressed as rd=Vds/ Id where Vgs is held constant.

TRANCE CONDUCTANCE (gm)


It is also called forward transconductance. It is given by the ratio of small change in drain current
(Id) to the corresponding change in gate to source voltage (V ds)
Mathematically the transconductance can be written as
gm=Id/Vds
AMPLIFICATION FACTOR ()
It is given by the ratio of small change in drain to source voltage (V ds) to the corresponding change
in gate to source voltage (Vgs)for a constant drain current (Id).
Thus

=Vds/Vgs when Id held constant

The amplification factor may be expressed as a product of transconductance (g m)and ac drain


resistance (rd)
=Vds/Vgs=gm rd

JFET BIASING

The purpose of biasing is to select the proper dc gate-to-source voltage to establish a desired
value of drain current and, thus, a proper Q-point. Three types of bias are self-bias, voltagedivider bias, and current-source bias.

Self-Bias:

Self-bias is the most common type of JFET bias. Recall that a JFET must be operated such that
the gate-source junction is always reverse-biased. This condition requires a negative VGS for
an n-channel JFET and a positive VGS for a p-channel JFET. This can be achieved using the
self-bias arrangements shown in Figure. The gate resistor, RG, does not affect the bias because
it has essentially no voltage drop across it; and therefore the gate remains at 0 V. RG is
necessary only to force the gate to be at 0 V and to isolate an ac signal from ground in
amplifier applications,

Voltage-Divider Bias

An n-channel JFET with voltage-divider bias is shown in Figure The voltage at the source of
the JFET must be more positive than the voltage at the gate in order to keep the gate-source
junction reverse-biased.

THE MOSFET

The MOSFET (metal oxide semiconductor field-effect transistor) is another category of fieldeffect transistor. The MOSFET, different from the JFET, has no pn junction structure; instead,
the gate of the MOSFET is insulated from the channel by a silicon dioxide (SiO2) layer. The
two basic types of MOSFETs are enhancement (E) and depletion (D).

D-MOSFETS can be operated in both the depletion mode and the enhancement mode.E
MOSFETS are restricted to operate in enhancement mode. The primary difference between
them is their physical construction. The construction difference between the two is shown in
the fig given below.

As we can see the D MOSFET have physical channel between the source and drain
terminals(Shaded area).
The E MOSFET on the other hand has no such channel physically. It depends on the gate voltage to
form a channel between the source and the drain terminals.
Both MOSFETS have an insulating layer between the gate and the rest of the component. This
insulating layer is made up of SIO2 a glass like insulating material. The gate material is made up of
metal conductor . Since the gate is insulated from the rest of the component, the MOSFET is
sometimes referred to as an insulated gate FET or IGFET.

Enhancement MOSFET (E-MOSFET)

The E-MOSFET operates only in the enhancement mode and has no depletion mode. the
substrate extends completely to the SiO2 layer. For an n-channel device, a positive gate
voltage above a threshold value induces a channel by creating a thin layer of negative charges
in the substrate region adjacent to the SiO2 layer, as shown in Figure. The conductivity of the
channel is enhanced by increasing the gate-to-source voltage and thus pulling more electrons
into the channel area. For any gate voltage below the threshold value, there is no channel.

The schematic symbols for the n-channel and p-channel E-MOSFETs are shown in Figure The
broken lines symbolize the absence of a physical channel. An inward pointing substrate arrow
is for n channel, and an outward-pointing arrow is for p channel. Some E-MOSFET devices
have a separate substrate connection.

Depletion MOSFET (D-MOSFET)

In the depletion MOSFET (D-MOSFET), The drain and source are diffused into the substrate
material and then connected by a narrow channel adjacent to the insulated gate. Both nchannel and p-channel devices are shown in the figure. The p-channel operation is the same,
except the voltage polarities are opposite those of the n-channel.

The D-MOSFET can be operated in either of two modesthe depletion mode or the
enhancement modeand is sometimes called depletion/enhancement MOSFET.Since the gate
is insulated from the channel, either a positive or a negative gate voltage can be applied. The
n-channel MOSFET operates in the depletion mode when a negative gate-to-source voltage is
applied and in the enhancement mode when a positive gate-to-source voltage is applied. These
devices are generally operated in the depletion mode.

Depletion Mode

Visualize the gate as one plate of a parallel-plate capacitor and the channel as the other plate.
The silicon dioxide insulating layer is the dielectric. With a negative gate voltage, the negative
charges on the gate repel conduction electrons from the channel, leaving positive ions in their
place. Thereby, the n channel is depleted of some of its electrons, thus decreasing the channel
conductivity. The greater the negative voltage on the gate, the greater the depletion of nchannel electrons. At a sufficiently negative gate-to-source voltage, VGS(off ), the channel is
totally depleted and the drain current is zero. This depletion mode is illustrated in Figure

Like the n-channel JFET, the n-channel D-MOSFET


conducts drain current for gate-to-source voltages
between VGS(off ) and zero. In addition, the D-MOSFET
conducts for values of VGS above zero.

Enhancement Mode

This operating mode is a result of applying a positive gate to source voltage Vgs to the device.
With a positive gate voltage, more conduction electrons are attracted into the channel, thus
increasing (enhancing) the channel conductivity,

When Vgs is positive the channel is effectively widened. This reduces the resistance of the
channel allowing ID to exceed the value of IDSS

When Vgs is given positive the majority carriers in the p-type are holes. The holes in the p
type substrate are repelled by the +ve gate voltage.

At the same time, the conduction band electrons (minority carriers) in the p type material are
attracted towards the channel by the +gate voltage.

With the build up of electrons near the channel , the area to the right of the physical channel
effectively becomes an N type material.

The extended n type channel now allows more current, Id> Idss

D-MOSFET Symbols

The schematic symbols for both the n-channel and the p-channel depletion MOSFETs are
shown in Figure.

THE IGBT

The IGBT (insulated-gate bipolar transistor) combines features from both the MOSFET and
the BJT that make it useful in high-voltage and high-current switching applications.

The IGBT is a device that has the output conduction characteristics of a BJT but is voltage
controlled like a MOSFET; The IGBT has MOSFET input characteristics and BJT output
characteristics.IGBT has three terminals: gate, collector, and emitter.

Vous aimerez peut-être aussi