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DIGITAL LOGIC DESIGN

(DLD)

Lecture # 10

Combinational Logic and Half Adders

University of Management & Technology

BASIC COMBINATIONAL LOGIC CIRCUITS

AND-OR logic
AND-OR

logic
SOP

produces an
expression.
In general, an ANDOR circuit can have
any number of AND
gates each with any
number of inputs.

A
B
C
D

AB

SOP
X=AB+CD

CD

BASIC COMBINATIONAL LOGIC CIRCUITS


inputs

A
B
C
D

AB
X=AB+CD
CD

AB

CD

o/p

BASIC COMBINATIONAL LOGIC CIRCUITS


AND-OR-Invert
A

logic
AB

B
X=AB+CD
C
D

AB+CD
CD

POS
X ( A B )(C D )

BASIC COMBINATIONAL LOGIC CIRCUITS


Exclusive-OR
Inputs

logic

X A B

X A B AB
or

X AB A B

A
X AB A B

XOR

BASIC COMBINATIONAL LOGIC CIRCUITS


Exclusive-NOR

logic

X ( AB )( A B ) ( A B )( A B ) A B AB

X AB A B

XOR

A
X
B

X A B

AB

B
X
AB

IMPLEMENTING COMBINATIONAL LOGIC

Boolean expression
logic circuit

For
every
Boolean
expression there is a logic
circuit, and for every logic
circuit there is a Boolean
expression

X AB CDE
X AB(CD EF )

X AB(CD EF ) ABC D ABEF

IMPLEMENTING COMBINATIONAL LOGIC

IMPLEMENTING COMBINATIONAL LOGIC


Truth

If

table logic circuit

you begin with a truth table of an

expression, you can write the SOP


expression from the truth table and
then implement the logic circuit.
Remember?

SOP

implementation.

AND-OR

TRUTH TABLE LOGIC CIRCUIT

TRUTH TABLE LOGIC CIRCUIT

MINIMIZING LOGIC & IMPLEMENTATION

MINIMIZING LOGIC &


IMPLEMENTATION

UNIVERSAL GATES

The NAND gate

UNIVERSAL GATES

The NOR gate

ADDERS
We

will start out simply, adding two single

digit binary numbers


Lets

make certain we can do this by hand

before we construct the circuit


There

are four possible combinations of

single digit, two number addition:


0 + 0 =0
0+1=1
1+0=1
1 + 1 = 10

PROBLEM ANALYSIS

Notice that one of the combinations of two single


digit additions is a double digit number, created
by
1 + 1 = 10

carry:

STANDARDIZED OUTPUT
Well

use leading zeros in order to produce a standard

output:
0

00

(0

plus

equals

0)

01

(0

plus

equals

1)

01

(1

plus

equals

1)

1 + 1 = 10 (1 + 1 equals 10)
Notice

that all of our answers include two bits. By putting

the output in standardized form, we can stipulate the


behavior of both outputs given any combination of two
inputs with the following truth table

TRUTH TABLE FOR ADDING


TWO 1-BIT NUMBERS
INPUTS

OUTPUTS

BREAKING DOWN THE TRUTH TABLE


INPUTS

OUTPUTS

Notice

the

column (carry line)

from

table? Recognize it?

Its

Q=AB

the
an

truth
AND!:

BREAKING DOWN THE TRUTH TABLE


INPUTS
A

OUTPUTS
Q

What

about the R column

(sum line)? What subexpression could we use?


What do you notice about
the R column?
R

is high iff one and

exactly one input is high.

BREAKING DOWN THE TRUTH


TABLE

R will be high iff one and exactly one input is


high.

What expression can we use to prove this


statement?
R = (~A B) + (A ~B)

CIRCUIT DIAGRAM
Q = (~A B) + (A ~B)

A
Q
B

A SHORT CUT
The

circuit we created to diagram our R column is

so common in circuit design that it has a special


name. It is called an Exclusive Or. It is usually
labeled XOR or drawn as a plus sign with a circle
around it.
From

our truth table, we can derive the following

statement: Our adding circuit should consist of an


XOR gate (for R output, the Sum line) and an AND
gate (for Q output, the Carry line).

MORE ON XOR
We

have already established that any circuit can be

created as a combination of 3 basic gates: NOT,


AND and OR.
Although

not one of the fundamental gates, the

XOR gate is common enough that it is called a


derived gate.
We

can build the XOR from the primitive gates.

However, engineers use the XOR so often theyve


given XOR its own symbol

XOR SYMBOL
The

symbol for the XOR Gate:


A
Q
B

Q = A+ B

RE-WRITING THE TRUTH TABLE


INPUTS
A

OUTPUTS
Q

AB

A+ B

The XOR circuit delivers the


Sum Line (R) of adding two
single digits.

The AND circuit produces the

fundamental circuit called a

Half Adder, which provides

Carry Line (Q).

Weve

just

created

the capability of adding two


single bit numbers.

CIRCUIT DIAGRAM FOR THE


HALF ADDER
A

RSUM

QCARRY

USING THE HALF-ADDER AS A


BUILDING BLOCK
The

Half-Adder circuit is more powerful than you

might think. It operates as the key component in a


divide-and-conquer approach to adding n digits.
How

does this work? The first leap of faith comes

in realizing that three single digit numbers could


be added two at a time:

First, add the first two digits together using a half-adder.

Then, add the result of this sum to the third number using another
half-adder.

FULL ADDER
Lets

try to add 3 single digit numbers by

stringing together two half-adders:

We need 3 input lines, one for each number.

Two input lines feed into the first half adder; the third input
line functions as a carry-in line.

The second half-adder has two input lines: the output sum
from the first half-adder, plus the third, carry-in input line.

The

next slides show the truth table for the

Full Adder and then the circuit diagram for the


Full Adder

TRUTH TABLE FOR THE FULL


ADDER
INPUTS

OUTPUTS

CIN

QCARRY

RSUM

CIRCUIT DIAGRAM FOR THE FULL ADDER

RSUM

B
QCARRY
CIN

SHORTHAND NOTATION FOR THE FULL


ADDER

The full adder is usually drawn in a shorthand


notation:

A
B
C

IN

QCARRY

FULL
ADDER

RSUM

INTERPRETING THE FULL ADDER CIRCUIT

Do you see any patterns between the output lines and the input
lines?

If you look at the truth table, you can see that the QCARRY
output line is true if and only if exactly two or three input lines
are high.

Also, the RSUM output line is high when the XOR of A and (the
sum of Input B and CIN) is high? In other words, add the Input
B and CIN values together, as though you were putting them
through a half adder. Take the result, and XOR it with the
value of the A input line. The result is the value for the RSUM
output line

SUMMARIZING THE FULL ADDER

By connecting two half-adders together, we can


add 3 single digit binary numbers

It shouldnt come as a surprise to learn that by


stringing even more half-adders together, we can
add even more single digit numbers

THE N-BIT ADDER


The

next leap of faith is to move from adding 3 (or more)

single digit numbers to adding multi-bit numbers


First,

note that the sum of adding two N-bit numbers can

be N + 1 bits
This

comes as a result of possibly obtaining a carry into

the next column


Adding

its

N-bit numbers isnt an abstract consideration

a real computing operation - at a minimum, a

modern computer would add 16 bit numbers, done with a


16-bit adder

THE N-BIT ADDER


Here

is the general rule: to add two N-bit numbers,

N full adders are required, one for each column in


the sum
The

first 2 inputs for each full adder come from the

digits in the numbers to be added


The

carry-out produced for each column is used as

the carry-in for the next column to the left


At

some point, you can have overflow as you exceed

the adder circuitry capability.

GETTING REAL
The

processing component of the ALU the

arithmetic logic unit uses Adder circuitry to


perform fundamental arithmetic operations.
By

connecting half adders to make a full

adder, and multiple full adders in a chain, we


now can work our way to simple addition.
Other

operations are a variation on this

fundamental capability

HOW TO SUBTRACT

What other arithmetic operations do we need to be able to


perform with circuits?

The next logical step would be to tackle subtraction

We could come up with a separate subtraction circuit,


and some clever scheme of knowing which circuit to
activate based on what kind of math problem we
encountered

It turns out that the solution is more elegant -- it uses


the approach we have seen repeatedly: turn a new
problem into a problem we have already solved

FROM SUBTRACTION TO ADDITION


What

we have is a circuit that can add numbers. We

want to make this circuit also work for subtracting two


numbers
Lets

rethink our problem, with a specific example: 5 - 2


3,

or,

put

another

way:

5 + (-2) = 3
Now,

we

have

an

addition

problem,

instead

of

subtraction. This means our existing circuit will work we


could unlock how to represent negative numbers, like -2.

TWOS COMPLEMENT
Remember

numbers

that we can represent negative


using

scheme

called

Twos

Complement.
In

twos complement, to encode a negative

number,

you

take

its

positive

value,

complement it, and then add one.


The

resulting number will be in twos

complement form.

REVIEW OF TWOS COMPLEMENT


1.

Convert each number from Base-10 to its


Base-10 format (well use four-bit numbers);
for negative values, convert their absolute
value:
510 = 01012
|-210| = 00102

REVIEW OF TWOS COMPLEMENT


2.

Complement the negative value, changing all


1s to 0s and all 0s to 1s. The result is called a
Ones
00102 11012

Complement:

REVIEW OF TWOS COMPLEMENT


3.

Add 1 to the Ones Complement. The result is


your original negative number in Twos
Complement
-210 00102 11012 + 12 = 11102

form:

PROBLEM SOLUTION

Then, we add the first number of our problem (510


or 01012) to this twos complemented number:
01012 + 11102 = 100112

If we throw away the carry line (the leftmost 1), our


answer

is

correct:

00112 = 310

Is that legal? Why or why not? We are restricting


ourselves here to 2, 4-bit numbers. We can choose to
simply ignore the carry line (the 5 th bit).

BUILDING IT WITH CIRCUITS


Can

we make this fly with our circuitry?

Lets

map each step

The

first step was to create the twos

complement of the number we subtracted.


We

did this in a two-step process: first we

took the ones complement, then added


one to get the final twos complement.

THE CIRCUITRY OF TWOS


COMPLEMENT
How

would we take ones complement?

A NOT gate would work here. Any number you put in, the
NOT gate would reverse

The

next step would be to add one we could

use an addition circuit, to make certain one was


added.
Now

we have the twos complemented number,

and it is combined with the first number in an


adder circuit to produce an answer.

PRETTY CLOSE
This

is pretty close to how subtraction is actually

performed in a computer.
There

are a few tweaks for efficiency and minimal

circuit design
The

second step of twos complement requires you

to add one, and we could do this with an adder.


However, do you remember how we built our multibit adder by stringing together multiple adders?

SUMMARY OF SUBTRACTORS
Represent

the subtraction problem as an addition

problem by adding a negative value of the number.


We

can represent negative numbers using Twos

Complement.
Once

we have converted the subtraction problem

to an addition problem, we can use an adder, built


from a half-adder consisting of an And and an
XOR gate.

SUBTRACTION: THE RULE


By

using the twos complement approach,

the following rule applies for performing


the arithmetic operation of subtraction:
X Y can be computed by adding the
negative of Y to X using addition circuitry
designed

for

positive

numbers,

and

ignoring any carry-out that is produced.