EFFICIENT HEURISTIC APPROACH BASED

RECTILINEAR STEINER TREE CONSTRUCTION UNDER

OBSTACLE-AVOIDING ENVIRONMENT

Under the Guidance of

Dr. HAMEEM SHANAVAS

Prof, Dept of ECE ,
MVJ college ,B lore

Presented by
AMALA.M
(BL16PHEL008)
Dept. of ECE
C. Byregowda Institute of Technology,
Kolar

Introduction

In today's VLSI designs, the obstacle-avoiding rectilinear Steiner

minimum tree (OARSMT) problem has become an important
problem in the physical design stage of VLSI circuits.
This problem has attracted a lot of attentions in research. In recent
years, scaling down device dimension or utilizing novel
crystallization technologies provide the opportunity of applying much
more devices to integrated circuit fabrication.
However, it also brings a lot of physical characteristics which were
neglected in the past the problems contain wire congestion, delay,
crosstalk, etc. Therefore, the researches about routing have drawn
much attention in VLSI Physical Design.

Introduction contd.

1. To shorten delay time as a result of minimizing the total

wire length.
2. The foregoing obstacles would block a routing
fabrication, there are two ways to solve these obstacles at
present. The first way is to obtain the routing result without
considering the obstacles, and later to adjust the line among
the obstacles.
3. To construct the routing tree considering the obstacles. It is
called obstacle-avoiding rectilinear Steiner minimal tree
(OARSMT).

OBJECTIVES OF THE RESEARCH WORK

To Review the Existing Algorithms .
To study swarm intelligence ideas & concepts .
To develop an Routing Algorithm Which Can Handle More
Terminals In t he Present Of Obstacles With Short Wire Length
Performance
Implementation For Multi Ports And Pins
To Achieve High Run Time
To Determine Cross Talk And Interference .
To Achieve Global Optimum Solution With High Effiency.

Literature survey
Sl.
No

Algorith Underlying
m

Concept

01 Escape
graph
based

02

Track
graph
based

Ganley et al
introduced a
strong connection
graph called
escape grape and
proved that all
steiner points in
the optimal
solution can be
found
Wu et in
al this
graph
introduced track
graph a grid like
structure
whichconsists of

Merits

Demerits

It works well when the

terminals are less than
7 and obstacles are
convex

The number of
edges and vertices
in escape graph is
much larger than
that in track graph
so it is time
consuming

An OARSMan takes
about0.1,3and 32
seconds respectively to
construct a tree with
10,50 and 100

Takes longer time

for larger scale
design

Literature survey contd

Sl.
No

Algorith Underlying
m

03 Maze

Routing
based

04 Full

steiner
tree based
approach

Concept
To handle multipin nets &
multiple paths
between the pins
are kept untill
all the pins are
reached,then a
MST based
method is used
to
create an
It uses
OARSMT
.
GEOsteiner

Merits

Demerits

Can handle large scale

OARSMT problems
effectively

Performs much
slower

Can handle hundreds of

pins with multiple
approach which blockages, generating
is one of the best an optimal solution
RSMt
construction
techniques for
OARSMT,by

This algorithm is
affected by number of
virtual terminals
required. Most of the
cases contains oly 10
obstacles but running
time is expensive

METHODOLOGY

Literature review of existing methods.

In the first efforts will applied to obtain a good
approximate solution to the OARSMT problem within a
short time using heuristic methods
The practical heuristic solution will be obtained with help
of swarm intelligence, to construct a full-scale solutions to
the OARSMT problem
Ant Colony Optimization (ACO algorithm)
Artificial bee colony algorithm(ABC algorithm)
To select appropriate parameter values for instances of
different classes of swarm intelligence which are having
different properties for OARSMT problem.

Possible Outcomes
The contribution of this research will directed towards
development of practical heuristic, with help of swarm intelligence
To construct a full-scale solutions to the OARSMT problem
which can handle more terminals in the present of obstacles .
Short wire length performance
High time efficiency
Determine the cross talk and try to avoid it.

FACILITIES AVAILABLE AT RESEARCH

Research
centre :C.BYRE GOWDA INSTITUTE OF TECHNOLOGY,
CENTRE
BANGALORE,

The facilities available at research centre are

CADENCE EDA TOOL
MATLAB, version13.866 (R-2013b).
HIGH END SYSTEMS WITH INTERNET CONNECTIVITY
Journals(VTU-CONSORTIUM E-RESOURCES)

Access to IEEE

Access to ELSEVIER

Access to SPRINGER E-JOURNLS

J-GATE & DELNET

ISTE COLLEGE MEMBERSHIP

Thank you

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