Assignment on

8085 microprocessor

by sipul bhardwaj
14-ECE-11
5th semesester
8085 Microprocessor:

Memmory organisation & Interfacing

Architecture of 8085
Architecture 0f 8085 Cont
ALU Interrupt Control
Timing and Control Unit Serial I/O Control
General Purpose Address Bus
Registers Data Bus
Program Status word
Program Counter
Stack Pointer
Instruction Register and
Decoder
Architecture 0f 8085 Cont
Arithmetic Logic Unit (ALU)
8085 has 8-bit ALU
Performs arithmetic & Logic operations on
data
Timing & Control Unit
Generates timing and control signals
General Purpose Registers
8-bit registers (B,C,D,E,H,L)
16-bit register pairs (BC, DE, HL,PSW)
Architecture 0f 8085 Cont
Interrupt Control
8085 has 5 interrupt signals
INTR general purpose interrupt
RST 5.5 Restart Interrupts
RST 6.5
RST 7.5
TRAP non-maskable interrupt
The interrupts listed above are in increasing
order of priority
 Architecture 0f 8085 Cont
Address Bus
Used to address memory & I/O devices
8085 has a 16-bit address bus

Higher-order Address Lower-order Address

A15 A14 A13 A12 A11 A10 A9 A8 AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0

Data Bus
Data Bus
Used to transfer instructions and data
8085 has a 8-bit data bus
8085 Communication with Memory
Involves the following three steps
1. Identify the memory location (with address)
2. Generate Timing & Control signals
3. Data transfer takes place
Example: Memory Read Operation

2
 1

3
2
Timing Diagram
Demultiplexing Address/Data Bus
8085 identifies a memory location with its 16
address lines, (AD0 to AD7) & (A8 to A15)
8085 performs data transfer using its data
lines, AD0 to AD7
Lower order address bus & Data bus are
multiplexed on same lines i.e. AD0 to AD7.
Demultiplexing refers to separating Address &
Data signals for read/write operations
Need for Demultiplexing
RD
A8-A15
20H

AD0-AD7
8085 05H Memory

4FH 2005H
Need for Demultiplexing
The 16-bit address of the memory location
must be applied to the memory chip for the
whole duration of the memory read/write
operation.
Lower-order address needs to be saved
before microprocessor uses it for data
transfer
8085 Interfacing with Memory chips

Address Address

Data Memory Data Memory

8085
Interface Chip

Control Control
8085 Interfacing with Memory chips

Data

74LS373 Memory
8085 AD0-AD7 A0 A7
ALE
Chip
A8-A15 A8-A15

Control

Memory
Interface
8085 Interfacing with Memory chips
Data

74LS373 Program
8085 AD0-AD7 A0 A7
ALE
Memory
A8-A15 A8-A15
CS
IO/M
RD
RD
Memory
Interface
 U3
U1 U2
36 12 3 2 10
RST-IN AD0 13 4 D0 Q0 5 9 A0 11
1 AD1 14 7 D1 Q1 6 8 A1 O0 12
X1 AD2 15 8 D2 Q2 9 7 A2 O1 13
AD3 16 13 D3 Q3 12 6 A3 O2 15
2 AD4 17 14 D4 Q4 15 5 A4 O3 16
X2 AD5 18 17 D5 Q5 16 4 A5 O4 17
5 AD6 19 18 D6 Q6 19 3 A6 O5 18
6 SID AD7 30 11 D7 Q7 1 A7 O6 19
TRAP ALE G OC O7
9 74LS373
8 RST 5.5 21 25
7 RST 6.5 A8 22 24 A8
RST 7.5 A9 23 21 A9
10 A10 24 23 A10
11 INTR A11 25 2 A11
29 INTA A12 26 26 A12
33 S0 A13 27 27 A13
39 S1 A14 28 1 A14
35 HOLD A15 A15
38 READY 34 20
4 HLDA IO/M CE
37 SOD 32 22
3 CLKO RD OE/VPP
RST-OT
WR

8085
27C512A
31
Memory Mapping
8085 has 16-bit Address Bus
The complete address space is thus given by
the range of addresses 0000H FFFFH
The range of addresses allocated to a
memory device is known as its memory map
Memory map: 64K memory device
Address lines required: 16 (A0 A15)
Memory map: 0000H - FFFFH

Memory map: 32K memory device

Address lines required: 15 (A0 A14)
Memory map: depends on how address line
A15 is connected
 U1 U2 U4
36 12 3 2 10
RST-IN AD0 13 4 D0 Q0 5 9 A0 11
1 AD1 14 7 D1 Q1 6 8 A1 O0 12
X1 AD2 15 8 D2 Q2 9 7 A2 O1 13
AD3 16 13 D3 Q3 12 6 A3 O2 15
2 AD4 17 14 D4 Q4 15 5 A4 O3 16
X2 AD5 18 17 D5 Q5 16 4 A5 O4 17
5 AD6 19 18 D6 Q6 19 3 A6 O5 18
6 SID AD7 30 11 D7 Q7 1 A7 O6 19
TRAP ALE G OC O7
9 74LS373
8 RST 5.5 21 25
7 RST 6.5 A8 22 24 A8
RST 7.5 A9 23 21 A9
10 A10 24 23 A10
11 INTR A11 25 2 A11
29 INTA A12 26 26 A12
33 S0 A13 27 27 A13
39 S1 A14 A14
35 HOLD 281 U5A
38 READY A15 3 20
4 HLDA 342 CE
37 SOD IO/M
3 CLKO 32 74LS32 22
RST-OT RD 1 OE
VPP
WR

8085
27C256
31

Memory device is selected only if IO/M = 0 & A15 = 0

 So the memory map is

A15 A14 A13 A12 A11 to A0

0 0 0 0 0. 0 0 = 0000H

to
A15 A14 A13 A12 A11 to A0

0 1 1 1 1. 111 = 7FFFH
Interfacing I/O devices
with 8085

Peripheral-mapped I/O
&
Memory-mapped I/O
Interfacing I/O devices with 8085

I/O I/O
Interface Devices

System Bus
8085

Memory Memory
Interface Devices
Techniques for I/O Interfacing
Memory-mapped I/O
Peripheral-mapped I/O
Memory-mapped I/O
8085 uses its 16-bit address bus to identify a
memory location
Memory address space: 0000H to FFFFH
8085 needs to identify I/O devices also
I/O devices can be interfaced using
addresses from memory space
8085 treats such an I/O device as a memory
location
This is called Memory-mapped I/O
Peripheral-mapped I/O
8085 has a separate 8-bit addressing scheme
for I/O devices
I/O address space: 00H to FFH
This is called Peripheral-mapped I/O or
I/O-mapped I/O
8085 Communication with I/O devices
Involves the following three steps
1. Identify the I/O device (with address)
2. Generate Timing & Control signals
3. Data transfer takes place
8085 communicates with a I/O device only if
there is a Program Instruction to do so
1.Identify the I/O device (with address)
1. Memory-mapped I/O (16-bit address)
2. Peripheral-mapped I/O (8-bit address)
2.Generate Timing & Control Signals
Memory-mapped I/O
Reading Input: IO/M = 0, RD = 0
Write to Output: IO/M = 0, WR = 0

Peripheral-mapped I/O
Reading Input: IO/M = 1, RD = 0
Write to Output: IO/M = 1, WR = 0

3. Data transfer takes place

8085 Communication with I/O devices
Involves the following three steps
Identify the I/O device (with address)
Generate Timing & Control signals
Data transfer takes place

8085 communicates with a I/O device only if

there is a Program Instruction to do so
Peripheral I/O Instructions
IN Instruction
Inputs data from input device into the
accumulator
It is a 2-byte instruction
Format: IN 8-bit port address
Example: IN 01H
Output instruction
OUT Instruction
Outputs the contents of accumulator to an
output device
It is a 2-byte instruction
Format: OUT 8-bit port address
Example: OUT 02H
----------Example Program----------
WAP to read a number from input port (port
address 01H) and display it on ASCII display
connected to output port (port address 02H)
IN 01H ;reads data value 03H (example)into
;accumulator, A = 03H
MVI B, 30H;loads register B with 30H
ADD B ;A = 33H, ASCII code for 3
OUT 02H ;display 3 on ASCII display
Memory-mapped I/O Instructions
I/O devices are identified by 16-bit addresses
8085 communicates with an I/O device as if it
were one of the memory locations
Memory related instructions are used
For e.g. LDA, STA
LDA 8000H
Loads A with data read from input device with
16-bit address 8000H
STA 8001H
Stores (Outputs) contents of A to output device
with 16-bit address 8001H
----------Example Program----------
WAP to read a number from input port (port
address 8000H) and display it on ASCII
display connected to output port (port
address 8001H)
LDA 8000H;reads data value 03H (example)into
;accumulator, A = 03H
MVI B, 30H;loads register B with 30H
ADD B ;A = 33H, ASCII code for 3
STA 8001H;display 3 on ASCII display
8085 Microprocessor:

Types of Memories
Memory types
There are several different types of memory in a
micro.One is Program memory.This is where the
program is located.Another is Data memory.This is
where data,that might be used by the program,is
located.The neat thing is that they both reside in the
same memory space and can be altered by the
program. Thats right,a program can actually alter
itself if that was necessary.Two terms are used when
talking about memory. Reading (load) is getting a
value from memory and Writing (store) is putting a
value into memory.
 There are three buses (not the kind you ride in)
associated with the memory subsystem. One is the
address bus, the second is the data bus, and the
third is the control bus. It's important for you to know
exactly how all this works, because these busses
transport data and addresses everywhere. All three
are connected to the memory subsystem. Its also
good to know the function of each to better
understand what's happening. In the 8085 CPU, the
address bus is 16 bits wide. It acts to select one of
the unique 216 (64K) memory locations. The control
bus determines whether this will be a read or a write.
 In the case of an instruction fetch, the control bus is
set up for a read operation. Data is read or written
through the data bus, which is 8 bits wide. This is
why all registers and memory are 8 bits wide, it's the
width of the data bus on the 8085 CPU. A bus is just
a group of connections that all share a common
function. Instead of speaking of each bit or
connection in the address separately, for example, all
16 are taken together and referred to simply as the
address bus. The same is true for the control and
data buses.
 A byte is the most used number in a micro because each
memory location or register is one byte wide. Memory
has to be thought of as a sort of file cabinet with each
location in it being a folder in the cabinet. In a file cabinet,
you go through the tabs on the folders until you find the
right one. To get to each memory location, a different
method is used. Instead, a unique address is assigned to
each location. In most micros this address is a word or 16
bits, or 4 digit hex. This allows for a maximum of 65536
(216 or 64K) unique addresses or memory locations that
can be accessed. These addresses are usually referred
to by a 4 digit hex number.
 Memory usually starts at address 0000h and could go
up to FFFFh (216 or 64K or 65536 in total). To
access these locations, a 16 bit address is presented
to memory and the byte at that location is either read
or written.
The Program Counter is what holds this address
when the micro is executing instructions. The reason
instructions are read sequentially, is because the
program counter automatically increments after
fetching the current instruction. It does this even
before the current instruction is acted upon.
 The sequence is that the program counter's contents are
placed on the memory address bus and the instruction is
fetched from memory through the data bus, and
immediately the program counter is incremented by 1.
Then the micro looks at the instruction and starts
processing it. If the instruction is not some kind of jump
or call, the instruction is completed and the program
counter is presented to the memory address bus again
and the next instruction is fetched, the program counter is
incremented and the process starts over. This is referred
to, in computer jargon, as fetch, decode, and execute.
In the case of reading or writing data, the
process is a little different. Data can be read
from or written to memory in similar fashion to
the fetch. But data does not need the decode
& execute steps.