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Registers
16 general purpose registers: R0~R15
each register is 32-bit long
R15 (PC): Program Counter
R14 (SP): Stack Pointer ( use other register)
R13 (FP): Frame Pointer ( build a DS called Stack and places
its address in FP
R12 (AP): Argument Pointer (used to pass list of arguments)
R6~R11: general
R0~R5: are used by some instructions
PSL: process status longword contains variable and
flags associated with in a process
VAX Architecture
Data Formats
Integers: byte, word, longword, quadword, or octaword
Negative integers: 2s complement representation
Floating-point: 4~16bytes
packed decimal: (C:positive, D:negative, F:unsigned)
4 4 4 4 4 S
zoned decimal: (digits are represented with ASCII codes)
0011 4 0011 4 S 4
e.g. +53842, 53842C (packed), 35333834C2 (zoned)
e.g. -6071, 6071D(packed), 363037D1
numeric format: trailing numeric, leading separate
numeric
VAX Architecture
Instruction Formats
variable -length instruction format
Addressing Modes
register mode operand itself may be in the register
register deferred mode -address may be specified by the reg
Auto increment and auto decrement modes
register content may be increment or decrement
several base relative addressing modes displacement field
program-counter relative modes
indirect addressing mode (called deferred modes)
immediate operands
VAX Architecture
Instruction Set
Goal: symmetric with respect to data type
The instruction mnemonics are formed by
a prefix that specifies the type of operation
a suffix that specifies the data type of the operands
a modifier that gives the number of operands involved
e.g. ADDW2, MULL3, CVTWL(conversion from word to long
word)
A single instruction for
saves a designated set of registers
passes a list of arguments to the procedure
maintains the stack, frame, and argument pointers
sets a mask to enable error traps for arithmetic operations
VAX Architecture