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# Digital Electronics

## The Flip Flop

And Sequential Logic
By N. Emmanuel
Circuit Types
1. Combinational Circuits

## Single Gate or many gates connected

together
Output ALWAYS depends on a
Combination of inputs
eg The NOR gate outputs 1
ONLY when ALL inputs are 0
Circuit Types
2.Sequential Circuits

## Output depends on current input combination

and previous output.

## Output can be predicted ONLY in sequence

ie not by input state ONLY

## Eg. All flip-flops and circuits made from flip-flops.

The Flip-Flop
A circuit that has two stable states.
ie On or OFF
Its called a bistable element.
Also called a latch
ie it keeps its output state .(.has Memory)
Hence, it maintains its ON/OFF
State until it is required to do
otherwise.
Used in Sequential Logic Circuits
The Flip-Flop
Types of flip-flops
1. SR Flip Flop
2. JK Flip Flop
3. D Flip Flop
4. T flip-flop
The Flip-Flop
The SR Flip Flop [set..(S)-reset..(R) ]
Two cross-coupled NOR Gates
Circuit Symbol Truth
Diagram S
Table R Q
0 0 Hold
1 0 1
0 1 0
1 1 Unpredictabl
e

Usable Output is at Q
is always the inverse of Q
The Flip Flop
The T flip-flop ..(toggle)
T input acts like a switch for changing
the STATE of the output, Q
The Register
Circuit for STORING data
Sometimes called a shift register when it
shifts/moves data elsewhere, after storing.
Each flip-flop is a 1-Bit Register
Generally, they employ many Flip-flops
Serial, having a single output delivering a string
of n Bits per second
Parallel, having n outputs simultaneously
delivering many single bits (ie n-Bit words) per
second,
The Register
The 3-bit Binary Counter
A register having 3 T flip-flops connected
together
Their inputs are tied together
The three outputs form a 3-Bit binary number
with EACH clock pulse(a count)
The count is incremented with each clock pulse.
23 3-Bit codes can
be represented,
ie 0 to 7 in the
decimal system
The Register
3-Bit Counter continued
Timing Diagramnegative trigger Truth Table
LS MS
B B
The Register
3-Bit Counter continued
Its Operation
1. Clock feed flip-flop 1 so 1 changes state at each clock pulse
(Q0 the LSB)
( ie clock pulse delivers 1)

## 2. of Flip-flop 1 feeds the clock input of flip-flop 2. so flip-

flop 2 changes state every 2 clock pulses(ie when is 1)

## 3. of Flip-flop 2 feeds the clock input of flip-flop 3. so flip-

flop 3 changes state every 4 clock pulses. (Q2 the MSB)
(..only when is 1)
7
+ 5
12 (digits 0 9 are used)
In the Binary System ONLY 0 and 1
are used
and 0s ONLY

a. b c. d.

+
1000
Truth Table

Circuit
Diagra
m

Symbo
l