1

RIPHAH INTERNATIONAL
UNIVERSITY

Digital Signal Processing:

STRUCTURES FOR DISCRETE-TIME

SYSTEMS
Dr. Faraz Akram
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Block diagram representation of linear

constant-coefficient difference
equation

Direct Forms
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Difference Equation
= 1 1 + 2 2 + 0 []

The corresponding transfer function is

0
=
1 1 1 2 2

Block diagram representation

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FIR filter direct

realization
= [0.045016 ; 0 ; 0.075026 ;
0.159155 ; 0.225079 ; 0.25
; 0.225079 ; 0.159155 ;
0.075026 ; 0 ; 0.045016]
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IIR FILTER STRUCTURES

Block Diagram and Signal Flow Graph

Direct Form I
Direct Form II
Transposed Direct Forms
Cascade Form
Parallel Form
Direct Form 6

Block diagram (Direct Form I)

= +
=1 =0

=0

=
1
=1

=
=0

= + []
=1
Direct Form 7

Alternative block diagram

A block diagram can be rearranged or modified in a variety of ways without
changing the overall system function.
Direct Form 8

Direct form II
No need to store the same data twice in
previous system
So we can collapse the delay elements
into one chain
This is called Direct Form II or the
Canonical Form
Theoretically no difference between
Direct Form I and II
Implementation wise
Less memory in Direct II
Direct Form 9

Example
Consider the LTI system
1 + 2 1
=
1 1.5 1 + 0.9 2

Comparing with general form

=0

=
1
=1

0 = 1, 1 = 2
1 = 1.5, 2 = 0.9
Signal Flow Graph 10

Signal Flow Graph Representation

Similar to block diagram representation
Notational differences
A network of directed branches connected at nodes

Example representation of a difference equation

Signal Flow Graph 11

Example
Signal Flow Graph 12
Signal Flow Graph 13

Example
1 + 2 1 + 2
=
1 0.75 1 + 0.125 2
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TRANSPOSED DIRECT FORMS

Transposed Direct Form 15

Transposition
Transposition Theorem
If we reverse the direction of all branches and interchange input and output in the
flow graph (or given structure) then the system transfer function remains unchanged

Can convert any block diagram into an equivalent transposed form:

Reverse direction of each interconnection
Interchange the input and output signals
Reverse direction of each multiplier
Change junctions to adders and vice-versa

Transposed Direct Form II

Transposed Direct Form 16
Direct Form 17

Direct form structures

Why these structures are called direct form structures?
Because they are obtained directly from the corresponding transfer
functions without any rearrangements

Advantage:
The only advantage of direct form realization is its
implementation which is easy.
We prefer direct form II compared to direct form I
because less memory locations are required.
Cascade Form 18

CASCADE FORM STRUCTURES

Cascade Form 19

Cascade Form Structures

Objective: Represent a filter as a cascade of subsystems

To obtain a cascade form realization; the numerator and denominator of the

given transfer function H(z) is factored
Then the total transfer function is expressed as
= 1 . 2
Cascade Form 20

Example
1 + 2 1 + 2 1 + 1 1 + 1
= =
1 0.75 1 + 0.125 2 1 0.5 1 1 0.25 1

Cascade form
1 + 1 1 + 1
=
1 0.5 1 1 0.25 1

There are other possible cascade forms for

Cascade Form 21

Example cont.
1 + 1 1 + 1
=
1 0.5 1 1 0.25 1
Parallel Form 22

PARALLEL FORM
Parallel Form 23

Parallel form
Objective: Represent a filter as a sum of subsystems

A partial-fraction expansion of the transfer function leads to the parallel form

structure
Parallel Form 24

Example
Second order
1 + 2 1 + 2 7 + 8 1
= =8+
1 0.75 1 + 0.125 2 1 0.75 1 + 0.125 2

18 25
=8+ First order
1 0.5 1 1 0.25 1
Parallel Form 25
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Feedback in IIR systems

= 2 1 +
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FIR FILTER STRUCTURES

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FIR System Structures

FIR is just a particular case of IIR, where denominator=1, as a consequence
Direct form I (normal and transposed) can be obtained
Direct form II do not apply
Cascade structures can be obtained
Parallel structures do not apply
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Cascade form
Quiz 31

Q 1) Consider the discrete-time linear causal system defined by the difference equation
1 1 2
1 + [ 2] = [ 1]
2 4 3
Draw the signal flow graph to implement this system in each of the following forms
Direct Form I, Direct Form II, Cascade, Parallel

Q 2) An LTI system is characterized by the signal flow graph shown below

[] []

1 1
3 1

1 1

1 2

a) Write the difference equation

b) Write the transfer function
c) In the realization shown, how many real multiplications and real additions are required to
compute each sample of output? (Assume x[n] is real, and assume that multiplication by 1
does not count in total)
d) The given realization requires four storage registers (delay elements). Is it possible to reduce
the number of storage registers by different structure? If so, draw the flow graph; if not,
explain why?