Module : Embedded & Real Time System.

Lecture : 7

UNIT2 : Instruction Sets

Topics Covered :ARM

Lecture by :P. Jenifer Darling Rosita,

ARM INSTRUCTION SET

ARM versions.
ARM assembly language.
ARM programming model.
ARM Instruction set

Overheads for Computers as Components 2nd ed. 2008 Wayne Wolf

ARM VERSIONS

ARM architecture has been extended over several versions.

We will concentrate on ARM7
Von-Newman Architecture.

ARM 9
Harvard Architecture.

Overheads for Computers as Components 2nd ed. 2008 Wayne Wolf

 ARM Word
-32-bit long.
-Word divided into four 8- bits.
ARM address
-32- bit long.

Some of the features if General purpose processor

Sophisticated instruction set.
provides the functionality of a general computer
Increases the performance
reduced code size
improve program characteristics.
 ARM PROGRAMMING MODEL

ARM is a load-store architecture

data operands must first be loaded into the CPU and then stored back to
main memory to save the results.
ARM has 16 general-purpose registers, r0 through r15.

Except for r15, they are identical

The r15 register has the same capabilities as the other registers, but it is
also used as the program counter.

Program Counter:
It store the address of next instruction to be executed.

Overheads for Computers as Components 2000 Morgan Kaufman

ARM PROGRAMMING MODEL

r0 r8
r1 r9 0
31
r2 r10
r3 r11 CPSR
r4 r12
r5 r13
r6 r14 NZCV
r7 r15 (PC)

Overheads for Computers as Components 2nd ed. 2008 Wayne Wolf

 Current program status register (CPSR).

Then purpose of this register is set automatically

during every arithmetic, logical, or shifting
operation.
The top four bits of the CPSR hold the following
useful information about the results of that
arithmetic/-logical operation:
 The negative (N) bit is set when the result is negative
in twos-complement arithmetic.
The zero (Z) bit is set when every bit of the result is
zero.
The carry (C) bit is set when there is a carry out of the
operation.
The overflow (V) bit is set when an arithmetic
operation results in an overflow.

These bits can be used to easily check the results of an

arithmetic operation.
ARM ASSEMBLY LANGUAGE

Fairly standard assembly language:

LDR r0,[r8] ; a comment

label ADD r4,r0,r1

Overheads for Computers as Components 2nd ed. 2008 Wayne Wolf

ARM DATA INSTRUCTIONS

Basic format:
ADD r0,r1,r2
Computes r1+r2, stores in r0.
Immediate operand:
ADD r0,r1,#2
Computes r1+2, stores in r0.

Overheads for Computers as Components 2nd ed. 2008 Wayne Wolf

ARM Conditional Codes
ARM DATA INSTRUCTIONS

ADD, ADC : add (w. carry) BIC : bit clear

SUB, SBC : subtract (w. carry)
RSB, RSC : reverse subtract (w.
carry)
MUL, : multiply
LSL, LSR : logical shift left/right
ASL, ASR : arithmetic shift
left/right
ROR : rotate right
RRX : rotate right extended with
C

Overheads for Computers as Components 2nd ed. 2008 Wayne Wolf

ARM MOVE INSTRUCTIONS

MOV, MVN : move (negated)

MOV r0, r1 ; sets r0 to r1

Overheads for Computers as Components 2nd ed. 2008 Wayne Wolf

EXAMPLE: C ASSIGNMENTS

C:
x = (a + b) - c;
Assembler:
ADR r4,a ; get address for a
LDR r0,[r4] ; get value of a
ADR r4,b ; get address for b, reusing r4
LDR r1,[r4] ; get value of b
ADD r2,r0,r1 ; compute a+b
ADR r4,c ; get address for c
LDR r2[r4] ; get value of c

Overheads for Computers as Components 2nd ed. v