Digital

Fundamentals
Tenth Edition

Floyd

Chapter 7

© 2009 Pearson Education,©Upper

2008 Pearson Education
Floyd, Digital Fundamentals, 10th ed Saddle River, NJ 07458. All Rights Reserved
 Summary
Flip-flops D flip-flop

The truth table for a positive-edge

triggered D flip-flop shows an up arrow to remind you
that it is sensitive to its D input only on the rising edge of
the clock; otherwise it is latched.
The truth table for a negative-edge triggered D flip-flop is
identical except for the direction of the arrow.
Inputs Outputs Inputs Outputs
D CLK Q Q Comments D CLK Q Q Comments
1 1 0 SET 1 1 0 SET
0 0 1 RESET 0 0 1 RESET

(a) Positive-edge triggered (b) Negative-edge triggered

Floyd, Digital Fundamentals, 10th ed © 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved
 Summary
Flip-flops D flip-flop

Floyd, Digital Fundamentals, 10th ed © 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved
 Summary
Flip-flops J-K flip-flop

The J-K flip-flop is more versatile than the D flip flop.

In addition to the clock input, it has two inputs, labeled J and
K.

Floyd, Digital Fundamentals, 10th ed © 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved
 Summary
Flip-flops J-K flip-flop

HIGH (1 ) 10
10 10
1 0

1
01 1
01
01
LOW (0 )

Floyd, Digital Fundamentals, 10th ed © 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved
 Summary
Flip-flops J-K flip-flop

HIGH (1 ) 1
1 01
1 0

1
0 1
1
10
HIGH (1 )

Floyd, Digital Fundamentals, 10th ed © 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved
 Summary
Flip-flops J-K flip-flop

HIGH (1 ) 1
0 10
1 1

1
1 0
1
01
HIGH (1 )
4

Floyd, Digital Fundamentals, 10th ed © 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved
 Summary
Flip-flops J-K flip-flop

The J-K flip-flop is more versatile than the D flip flop.

In addition to the clock input, it has two inputs, labeled J and
K.
When both J and K = 1, the output changes states (toggles) on
the active clock edge (in this case, the rising edge).
Inputs Outputs
J K CLK Q Q Comments
0 0 Q0 Q0 No change
0 1 0 1 RESET
1 0 1 0 SET
1 1 Q0 Q0 Toggle

Floyd, Digital Fundamentals, 10th ed © 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved
 Summary
Flip-flops Q
J

CLK
Determine the Q output for the J-K
flip-flop, given the inputs shown. K Q

Notice that the outputs change on the leading edge of the clock.

Set Toggle Set Latch

CLK

Floyd, Digital Fundamentals, 10th ed © 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved
 Summary
Flip-flops Asynchronous Preset and Clear Inputs
Synchronous inputs are transferred in the triggering edge
of the clock (for example the D or J-K inputs).
Most flip-flops have other inputs that are asynchronous,
meaning they affect the output independent of the clock.
PRE
Two such inputs are normally labeled
preset (PRE) and clear (CLR).
J Q
- These inputs are usually active LOW.
CLK
A J-K flip flop with active LOW PRE
(preset) and CLR is shown. K Q

CLR

Floyd, Digital Fundamentals, 10th ed © 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved
 Summary
Flip-flops Asynchronous Preset and Clear Inputs

0 1 0
1
1
1 1

0 0
1
1
1 1

Suppose, that the PRE and CLR were initially HIGH, and
a RESET signal was given to JK Flip-flop
Floyd, Digital Fundamentals, 10th ed © 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved
 Summary
Flip-flops Asynchronous Preset and Clear Inputs
00
0
1 1 0
0
1 1

0 0
0 1
1 1
1

Two
Nowones to an
let say Active
PRE low Flip-flop
is (active  No change
LOW) Enabled
Any
while thing
the clock
wrongpulse
here?is down
Floyd, Digital Fundamentals, 10th ed © 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved
 Summary
Flip-flops Asynchronous Preset and Clear Inputs

0 0
1 1 1
0
0 0

1 1
0 1
0
1 1 0

PRE will SET the Flip-flop

Floyd, Digital Fundamentals, 10th ed © 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved
 Summary
Flip-flops Asynchronous Preset and Clear Inputs

0
1

1
1
0
0
1

A simplified Description of SET

Floyd, Digital Fundamentals, 10th ed © 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved
 Summary PRE

Flip-flops
Flip-flops J Q

CLK

Determine the Q output for the J-K K Q

flip-flop, given the inputs shown.
CLR
Set Toggle Set Reset Toggle Latch
CLK

K Set
PRE Reset
CLR

Floyd, Digital Fundamentals, 10th ed © 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved