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DC Biasing - BJTs
Chapter 1 – Revision Part 2
Biasing
The DC input
establishes an
operating or
quiescent point
called the Q-point.
The Three Operating Regions
Active or Linear Region Operation
• Base–Emitter junction is forward biased
• Base–Collector junction is reverse biased
VCC VBE
IB
RB
Collector-Emitter Loop
Collector current:
IC IB
VCE VCC IC RC
Example: Fixed-Bias Configuration
Example: Fixed-Bias Configuration
𝑉𝐶𝐶 − 𝑉𝐵𝐸 12.0 𝑉 − 0.7 𝑉
a 𝐼𝐵𝑄 = = = 47.08 𝜇𝐴 * Remember VBE = 0.7 V
𝑅𝐵 240 𝑘Ω
when the transistor is in
𝐼𝐶𝑄 = 𝛽𝐼𝐵𝑄 = (50) 47.08 𝜇𝐴 = 2.35 𝑚𝐴 ACTIVE state (ON).
V
ICsat CC
R
C
VCE 0 V
Load Line Analysis
The Q-point is the operating point where the value of RB sets the
value of IB that controls the values of VCE and IC .
The Effect of VCC on the Q-Point
The Effect of RC on the Q-Point
The Effect of IB on the Q-Point
Emitter-Stabilized Bias Circuit
Adding a resistor
(RE) to the emitter
circuit stabilizes
the bias circuit.
Base-Emitter Loop
From Kirchhoff’s voltage law:
VCC IE RE VBE IE RE 0
Since IE = ( + 1)IB:
Since IE IC:
VCE VCC – I C(RC RE )
Also:
VE I E RE
VC VCE VE VCC IC RC
VB VCC – I R RB VBE VE
Example: Emitter-Bias Configuration
Example: Emitter-Bias Configuration
𝑉𝐶𝐶 − 𝑉𝐵𝐸 20.0 𝑉 − 0.7 𝑉
a 𝐼𝐵𝑄 = = = 40.1 𝜇𝐴
𝑅𝐵 + 𝛽 + 1 𝑅𝐸 430 𝑘Ω + (51)(1 𝑘Ω)
R2VCC
VB
R1 R2
VCC VBE
Solving for IB: IB
RB β(RC RE )
Collector-Emitter Loop
Applying Kirchoff’s voltage law:
To ensure saturation:
ICsat
IB
βdc
Emitter-collector
resistance at VCEsat VCC
Rsat Rcutoff
saturation and cutoff: ICsat ICEO
Switching Time
t on t r t d
t off t s t f
Troubleshooting Hints
Approximate voltages VBE .7 V for silicon transistors
VCE 25% to 75% of VCC