Vous êtes sur la page 1sur 90

Introduction to Microcontroller

Why do we need to learn


Microprocessors/controllers?

 The microprocessor is the core of computer


systems.
 Nowadays many communication, digital
entertainment, portable devices, are controlled by
them.
 A designer should know what types of
components he needs, ways to reduce production
costs and product reliable.
Different aspects of a
microprocessor/controller

 Hardware :Interface to the real world

 Software :order how to deal with inputs


Microprocessors:
General-purpose microprocessor
 CPU for Computers
 No RAM, ROM, I/O on CPU chip itself
 Example : Intel’s x86, Motorola’s 680x0

Many chips on mother’s board


Data Bus
CPU
General-
Serial
Purpose RAM ROM I/O Timer COM
Micro- Port
Port
processor
Address Bus

General-Purpose Microprocessor System


Microcontroller :
 A smaller computer
 On-chip RAM, ROM, I/O ports...
 Example : Motorola’s 6811, Intel’s 8051, Zilog’s Z8 and PIC 16X

CPU RAM ROM


A single chip
Serial
I/O Timer COM
Port
Port
Microcontroller
Microprocessor vs. Microcontroller

Microprocessor Microcontroller
 CPU is stand-alone, • CPU, RAM, ROM, I/O
RAM, ROM, I/O, timer and timer are all on a
are separate
single chip
 designer can decide on
the amount of ROM, • fix amount of on-chip
RAM and I/O ports. ROM, RAM, I/O ports
 versatility • for applications in which
 general-purpose cost, power and space
are critical
• single-purpose
History
Intel
 1969: Intel was a tiny start-up company in Santa Clara, headed by
Noyce and Moore.

 1970: Busicom placed an order with Intel for custom calculator


chips. Intel had no experience of custom-chip design and sets outs
to design a general-purpose solution.

 1971: Intel have problems translating architectures into working chip


designs - the project runs late.

 Faggin joins Intel and solves the problems in weeks.

 The result is the Intel 4000 family (later renamed MCS-4,


Microcomputer System 4-bit), comprising the 4001 (2k ROM), the
4002 (320-bit RAM), the 4003 (10-bit I/O shift-register) and the
4004, a 4-bit CPU.
Intel 4004

 Introduced in 1971, the Intel


4004 "Computer-on-a-Chip"
was a
2300 transistor device
capable of performing 60,000
operations per
second.

 It was the first-ever single-


chip microprocessor and had
approximately
the same performance as the
18,000 vacuum tube ENIAC.
The 4-bit
Intel C4004 ran at a Clock
Speed of 108 KiloHertz.
The Busicom Calculator

 The Busicom
calculator used five
Intel 4001’s, two
4002’s, three
4003’s and the
4004 CPU The original engineering prototype
of the Busicom desk-top printing
calculator, the world’s first
commercial product to use a
microprocessor.
Early Microcontrollers

 1974: Motorola (originally car radio manufacturers) had introduced


transistors in the 1950s and decided to make a late but serious effort in the
microprocessor market. They announced their 8-bit 6800 processor.
Though bulky, and fraught with production problems, their 6800 had a good
design.

 1975: General Motors approach Motorola about a custom-built derivative of


the 6800. Motorola's long experience with automobile manufacturers pays
off and Ford follow GM's lead.

 1976: Intel introduce an 8-bit microcontroller, the MCS-48. They ship


251,000 in this year.

 1980: Intel introduce the 8051, an 8-bit microcontroller with on-board


EPROM memory. They ship 22 million and 91 million in 1983.
Micro-controller applications
 Audio
 Automotive
 Medical
 Mobile/wireless
 Motor control
 Security
 And more…….
Harvard/ von Neumann architecture
Von Neumann and Harvard
architectures
 Von Neumann
 Allows instructions and data to be mixed and stored in the
same memory module
 More flexible and easier to implement
 Suitable for most of the general purpose processors (i.e.
Pentium is using an von Neumann architecture for the
external memory and is using a Harvard architecture for its
internal cache memory (allowing 8KB of cache for data and
anther (separate) 8kB of cache for instructions)
 Harvard:
 Uses separate memory modules for instructions and for data
 It is easier to pipeline
 Higher memory throughput
 Suitable for DSP (Digital Signal Processors)
System buses
 A bus is a set of wires, that interconnects all the components
(subsystems) of a computer
 Source component sources out data onto the bus, the
destination component inputs data from the bus
 A system may have a hierarchy of buses;
 The I/O controller may use a second bus, often described as
I/O bus or local bus to access a variety of attached devices
 PCI bus is an example of a very common local bus
Address bus
 CPU reads/writes data from the memory by
addressing a specific location; outputs the location of
the data on the address buss; memory uses the
address to access the proper data
 Each I/O device (such as monitor, keypad, etc) has a
unique address as well (or a range of addresses);
when accessing a I/O device, CPU places its address
on the address bus. Each device will detect if it is its
own address and act accordingly
 Devices always receive data from the CPU; CPU never
reads the address buss (it is never addressed)
Data bus
 When the CPU reads data from memory, it first outputs the
address on the address bus, then the memory outputs the
data onto the data bus; the CPU reads the data from data bus
 When writing data onto the memory, the CPU outputs first the
address on the address bus, then outputs the data onto the
output bus; memory then reads and stores the data at the
proper location
 The process to read/write to a I/O device is similar
Control bus
 Address and data buses consist of n lines, which
combine to transmit one n bit value; control bus is a
collection of individual control signals
 These signals indicate whether the data is to be read
into or written out the CPU, whether the CPU is
accessing memory or an IO device, and whether the
I/O device or memory is ready for the data transfer
 This bus is mostly a collection of unidirectional signals
Microcontrollers
 Processing power: 4 bit, 8 bit, 16 bit, 32 bit
 The highest rate of new product
success is in the 8-bit microcontroller
market. The lowest rate of success is
in the 64- and 32-bit microcontroller
markets
8-bit UC
 Low cost
 Inexpensive development software
 Low Power Design
8-bit UC
 Although high-end processors, especially 32-bit MCUs,
tend to be the center of attention these days, 8-bit
MCUs are more than holding their own.
 The 8-bit MCU continues to be the workhorse of the
automotive industry.
 It is valued because of its cost-effective control
functions, which enable consumers to enjoy the
benefits of smart products in the automobile sector.
 For example, the BMW 745i luxury sedan contains
more than sixty 8-bit MCUs.
 Enhanced architectures combined with process
portability have improved 8-bit MCUs from 100,000
instructions per second in the 1980s to more than 100
million instructions per seconds today-a thousandfold
increase
CISC
 A 2-operand format, where instructions have a source
and a destination.
 Register to register, register to memory, and memory
to register commands.
 Multiple addressing modes for memory, including
specialized modes for indexing through arrays
 Variable length instructions where the length often
varies according to the addressing mode
 Instructions which require multiple clock cycles to
execute.
 Complex instruction-decoding logic, driven by the need
for a single instruction to support multiple addressing
modes.
 A small number of general purpose registers.
 Several special purpose registers
Characteristics of CISC processors
 Complex and efficient machine instructions.
 Extensive addressing capabilities for memory operations.
 Relatively few registers.
 Richer instruction set, some simple, some very complex
 Instructions generally take more than 1 clock to execute
 Instructions of a variable size
 Instructions interface with memory in multiple mechanisms with
complex addressing modes
 No pipelining
 Upward compatibility within a family
 Microcode control
 Work well with simpler compiler
RISC
 The concept was developed by John Cocke of IBM
Research during 1974
 RISC is a type of microprocessor with a relatively
limited number of instructions.
 faster as well as easier and less expensive to
manufacture.
 The reduction in cost is because the RISC processors
require fewer transistors
 The increased speeds made these chips ideal for
almost all applications
Characteristics of RISC processors
 Reduced instruction set.
 Less complex, simple instructions.
 Hardwired control unit and machine instructions.
 Few addressing schemes for memory operands with
only two
 basic instructions, LOAD and STORE
 Many symmetric registers which are organized into a
register file.
 Simple primitive instructions and addressing modes
 Instructions execute in one clock cycle
 Uniformed length instructions and fixed instruction
format
 Instructions interface with memory via fixed
mechanisms (load/store)
 Pipelining
Micro-processor into Micro-controller

Connecting a processor to 32kb ram & 32kb rom

processor
Micro-processor into Micro-controller

Connecting a processor to 32kb ram & 32kb rom & serial space

processor
Address Range
1 111 1111 1111 1111
FFFF
32KB
8000
1 000 0000 0000 0000
0 111 1111 1111 1111
7FFF

32KB

0000 0 000 0000 0000 0000


Address Range
11 11 1111 1111 1111

32kb

10 00 0000 0000 0000


01 11 1111 1111 1111

16kb

01 00 0000 0000 0000


00 11 1111 1111 1111

16kb

00 00 0000 0000 0000


8051 Basic Component

 4K bytes internal ROM


 128 bytes internal RAM
 Four 8-bit I/O ports (P0 - P3).
 Two 16-bit timers/counters
 One serial interface
 64k external memory for code
 64k external memory for data
 210 bit addressable

Microcontroller
8051 PIN DIAGRAM
8051
Schematic
Pin out
P1.0 1 40 Vcc
P1.1 2 39 P0.0(AD0
P1.2 3 38 )P0.1(AD1)
P1.3 4 37 P0.2(AD2
P1.4 5 36 P) 0.3(AD3)
8051 P1.5 6 35 P0.4(AD4)

Foot Print
P1.6 7 34 P0.5(AD5)
P1.7 8 33 P0.6(AD6)
RST 9
8051 32 P0.7(AD7)
(RXD)P3.0 10 (8031) 31 EA/VPP
(TXD)P3.1 11 30 ALE/PROG
(INT0)P3.2 12
(8751) 29 PSEN
(INT1)P3.3 13 (8951) 28 P2.7(A15)
(T0)P3.4 14 27 P2.6(A14
(T1)P3.5 15 26 )P2.5(A13
(WR)P3.6 16 25 )P2.4(A12
(RD)P3.7 17 24 )P2.3(A11
XTAL2 18 23 )
P2.2(A10)
XTAL1 19 22 P2.1(A9)
GND 20 21 P2.0(A8)
IMPORTANT PINS (I/O Ports)

One of the most useful features of the 8051 is that it contains four I/O ports (P0 - P3)
Each port can be used as input or output (bi-direction)

Port 0
pins 32-39 (P0.0-P0.7)
 8-bit R/W - General Purpose
I/O
 Or acts as a multiplexed low
byte address and data bus
for external memory design
Port 0 with Pull-Up Resistors
Vcc
10 K

P0.0
DS5000 P0.1

Port 0
P0.2
8751 P0.3
8951 P0.4
P0.5
P0.6
P0.7
IMPORTANT PINS (I/O Ports)

Port 1
pins 1-8 (P1.0-P1.7)
 Only 8-bit R/W -

General Purpose I/O


IMPORTANT PINS (IO Ports)

Port 2
 pins 21-28 (P2.0-
P2.7)
 8-bit R/W -
General Purpose
I/O
 Or high byte of
the address bus
for external
memory design
IMPORTANT PINS (IO Ports)

Port 3
pins 10-17 (P3.0-P3.7)
 General Purpose I/O
 if not using any of the
internal peripherals
(timers) or external
interrupts.
Port 3 Alternate Functions
IMPORTANT PINS

 PSEN (out): Program Store Enable,


Enable, the read signal for external program memory (active low).
 This is an output pin and is connected to the OE pin of the ROM.
 EA (in): External Access Enable, active low to access external program memory locations 0 to 4K
 There is no on-chip ROM in 8031 and 8032 .
 The EA pin is connected to GND to indicate the code is stored externally.
 PSEN & ALE are used for external ROM.
 For 8051, EA pin is connected to Vcc.

 ALE (out): Address Latch Enable, to latch address outputs at Port0 and Port2
 It is an output pin and is active high.
 8051 port 0 provides both address and data.
 The ALE pin is used for de-multiplexing the address and data by connecting to the G pin of the
74LS373 latch.
Pins of 8051

 Vcc (pin 40)


 Vcc provides supply voltage to the chip.
 The voltage source is +5V.

 GND (pin 20)


ground

 XTAL1 & XTAL2: Crystal inputs for internal oscillator.

 XTAL1 and XTAL2 (pins 19 & 18)


 These 2 pins provide external clock.
 Way 1 : using a quartz crystal oscillator
 Way 2 : using a TTL oscillator
XTAL Connection to 8051
 Using a quartz crystal oscillator
 We can observe the frequency on the
XTAL2 pin.
C2
XTAL2
30pF

C1
XTAL1
30pF

GND
XTAL Connection to an External Clock Source

 Using a TTL oscillator


 XTAL2 is unconnected.

N XTAL2
C
EXTERNAL
OSCILLATOR XTAL1
SIGNAL

GND
Pins of 8051

 RST (pin 9)reset


 input pin and active high ( normally low ) .
 The high pulse must be high at least 2
machine cycles.
 power-on reset.
 Upon applying a high pulse to RST, the
microcontroller will reset and all values in
registers will be lost.
 Reset values of some 8051 registers
 power-on reset circuit
8051 REGISTERS
Registers in 8051 are classified as :

 General purpose registers :


R0, R1, R2, R3, R4, R5, R6, R7

 Special function registers :


SFRs
REGISTERS
 All registers are 8-bit registers in 8051

 Some are 16-bit registers. They are:


 DPTR – DPH, DPL
 PC
 T0 – TH0, TL0
 T1 – TH1, TL1
Stack in the 8051
 The register used to 7FH
access the stack is Scratch pad RAM
called SP (stack
pointer) register. 30H

2FH
Bit-Addressable RAM
 The stack pointer in
the 8051 is only 8 bits 20H
1FH
wide, which means 18H
Register Bank 3

that it can take value 17H


Register Bank 2
00 to FFH. When 8051 10H
0FH Stack) Register Bank 1)
powered up, the SP 08H
register contains value 07H
Register Bank 0
00H
07.
RESET Value of Some 8051
Registers

Register Reset Value


PC 0000
ACC 0000
B 0000
PSW 0000
SP 0007
DPTR 0000
RAM are all zero
MEMORY ORGANISATION
Types Of Memory
•The 8051 has three very general types of memory.

•To effectively program the 8051 it is necessary to have a


basic understanding of these memory types.

•The memory types are illustrated in the following graphic.

•They are: On-Chip Memory, External Code Memory, and


External RAM.
Types Of Memory

8051 External
Compact RAM
Micro

Internal
RAM

SFRs

Internal External
Code Code
(Optional)
Types of Memory
 On-Chip Memory refers to any memory (Code, RAM,
or other) that physically exists on the microcontroller
itself. On-chip memory can be of several types, but
we'll get into that shortly.

 External Code Memory is code (or program)


memory that resides off-chip. This is often in the form
of an external EPROM.

 External RAM is RAM memory that resides off-chip.


This is often in the form of standard static RAM or
flash RAM.
On-Chip Memory

 On-chip memory is really one of two types:


Internal RAM and Special Function Register
(SFR) memory. The layout of the 8051's
internal memory is presented in the
following memory map:
Register Banks
•Active bank selected by PSW [RS1,RS0] bit
• Permits fast “context switching” in interrupt service routines
(ISR).
Addressing modes
Addressing Modes
An "addressing mode" refers to how you are
addressing a given memory location
 Immediate
 Register
 Direct
 Register Indirect
 Indexed
Immediate Addressing Mode
MOV A,#65H
MOV A,#’A’
MOV R6,#65H
MOV DPTR,#2343H
MOV P1,#65H

Example :

Num EQU 30

MOV R0,Num
MOV DPTR,#data1

ORG 100H
data1: db “IRAN”
Register Addressing Mode
MOVRn, A ;n=0,..,7
ADD A, Rn
MOVDPL, R6

MOVDPTR, A
MOVRm, Rn
Direct Addressing Mode
Although the entire of 128 bytes of RAM can be accessed using
direct addressing mode, it is most often used to access RAM loc.
30 – 7FH.

MOV R0, 40H


MOV 56H, A
MOV A, 4 ; ≡ MOV A, R4
MOV r6, r2 ; copy R2 to R6
; MOV R6,R2 is invalid !

SFR register and their address

MOV 0E0H, #66H ; ≡ MOV A,#66H


MOV 0F0H, R2 ; ≡ MOV B, R2
MOV 80H,A ; ≡ MOV P1,A
Register Indirect Addressing Mode

 In this mode, register is used as a pointer to the data.

MOV A,@Ri ; move content of RAM loc.Where address is held by Ri into A


( i=0 or 1 )
MOV @R1,B

In other word, the content of register R0 or R1 is sources or target in MOV, ADD and SUBB
insructions.
Example:
Write a program to copy a block of 10 bytes from RAM location sterting at 37h to RAM location
starting at 59h.

Solution:
MOV R0,37h ; source pointer
MOV R1,59h ; dest pointer
MOV R2,10 ; counter
L1: MOV A,@R0
MOV @R1,A
INC R0
INC R1
DJNZ R2,L1
Indexed Addressing Mode And On-Chip
ROM Access
 This mode is widely used in accessing data
elements of look-up table entries located in the
program (code) space ROM at the 8051

MOVC A,@A+DPTR
A= content of address A +DPTR from ROM
Note:
Because the data elements are stored in the
program (code ) space ROM of the 8051, it uses
the instruction MOVC instead of MOV. The “C”
means code.
Timers
Timer
 A timer is a specialized type of clock. A timer can be used
to control the sequence of an event or process.
The 8051 comes equipped with two timers.
The 8051 timers have three general functions:
1) Keeping time and/or calculating the amount of time
between events,
2) Counting the events themselves, or
3) Generating baud rates for the serial port.
SFRs relating to timers
TMOD Register:

 Gate : When set, timer only runs while INT(0,1) is high.


 C/T : Counter/Timer select bit.
 M1 : Mode bit 1.
 M0 : Mode bit 0.
TCON Register:

 TF1: Timer 1 overflow flag.


 TR1: Timer 1 run control bit.
 TF0: Timer 0 overflag.
 TR0: Timer 0 run control bit.
 IE1: External interrupt 1 edge flag.
 IT1: External interrupt 1 type flag.
 IE0: External interrupt 0 edge flag.
 IT0: External interrupt 0 type flag.
How long does a timer take to
count?
 when a timer is in interval timer mode (as opposed to event
counter mode) and correctly configured, it will increment by 1
every machine cycle
 A single machine cycle consists of 12 crystal pulses.
 Thus a running timer will be incremented:
11,059,000 / 12 = 921,583 times per second.
 Thus if a timer has counted from 0 to 50,000 you may calculate:
50,000 / 921,583 =0.0542
0.0542 seconds have passed
Serial Communication
Serial Communications
Transmission modes

 Serial communications means that information is


transmitted from source to destination over a single
pathway
 Bit serial transmission:


Synchronization problem at: bit, word, frame level
Signal transitions occur according to a transmitter
clock
 Two modes of operation:
 asynchronous
 synchronous
Serial Communications
Transmission modes

 Two basic transmission modes:


 asynchronous: transmitter and receiver

clocks are independent


 synchronous: transmitter and receiver

are synchronized
Serial Communications
Asynchronous transmission


 Data word (octet) is encapsulated between:
 start bit
 stop bits(s)
 Receiver resynchronizes again at a start of each new
word (or character) received
Serial Communications
Asynchronous transmission

 Transmission parameters:
transmission rate (9600bps, 19200bps,
etc.) defines bit length in time
 number of stop bits (1, 1.5, 2)
 word length (usually 8 bits)
Serial Communications
Asynchronous transmission
 Error control: parity
 In an N bit word: count number of 1s on the first
N-1 positions
 Insert 1 or 0 in the Nth position to get:
even (even parity - E)

 odd (odd parity - O)


number of 1s
 Parity rather not used these days (parity none - N)
Serial Communications
Asynchronous transmission
 Convention:
 Parameters of an asynchronous transmission are often
presented in the following form:

Sbps xAz
where:
 S is a connection speed (19200, 38400bps,….)
 bps: bits per second
 x is a number of bits in a word (usually 8)
 A is parity (usually none: N)
 z is a number of stopbits
38400bps 8N1 is a good bet ;-)
Serial Communications
Synchronous transmission
 Transmitter and receiver clocks synchronized
 DTE accepts a clock signal generated by DCE
 Clock signal transmitted either:
 over a separate line ( RS232 lines)
 or encoded into the data (Manchester,
differential Manchester encoding) to allow a
single line for both data and clock
 No start, stop bits, but still frame synchronization
words are needed
Serial Communications
Comparison of transmission modes
 Asynchronous:
 suitable for data transmitted at random intervals (e.g.
keyboard to computer)
 large overhead (20% or more)
 rather low data rates (up to 115.2 kbps, practically 38.4 kbps)
 simplicity and availability: UART and RS232 are present in any
PC
 used in the great majority of dial-up connections
 Synchronous:
 low overhead (long frames)
 high rates
 less prone to errors
Start and stop bits
Data communication classification
SFRs relating to timers
SBUF : Serial Buffer Register
 Data moved to SBUF is Transmitted serially

 Serial data Rx-ed is stored by 8051 in SBUF

– SCON : Serial Control Register


 Program the mode
Serial Communication

 SCON
Mode Selection
Setting the Baud rate

 Timer 1is the timing controller for serial port in 8051


 Clock for the Timer1 in the UART is
– XTAL /12 /32 = 28,800Hz (for XTAL = 11.0592MHz)

Set SMOD bit (PCON.7) to program 8051 to use 1/16 multiplier


 XTAL / 12 / 16 = 56,700Hz
 Effectively doubles the baud rate

PCON Register:
SMOD -- -- -- GF1 GF0 PD IDL

Timer1 has to be programmed in


 – Mode 2, 8bit auto reload mode
 – Load TH1 with the required value
Setting the Baud rate
TH values (XTAL = 11.0592MHz)
 – Baud Rate: 9600 = 28800/3 -> TH1 = -3 = 0xFD
 – Baud Rate: 4800 = 28800/6 -> TH1 = -6 = 0xFA
 – Baud Rate: 2400 = 28800/12 -> TH1 = -12 = 0xF4
 – Baud Rate: 1200 = 28800/24 -> TH1 = -24 = 0xE8

If SMOD (PCON.7) is set then the same values for TH1 will give
 – 19200 etc