Three-state buffers

• Output = LOW, HIGH, or Hi-Z.

• Can tie multiple outputs together, if at most

one at a time is driven.
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 Different flavors

• Buffers are used to regenerate “Weak” values

(0 or 1) into “Strong” ones. So digital signals
can be transmitted over arbitrary distances
without loss of information.

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3
Timing considerations

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Three-state
drivers
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 Driver
application

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Three-state
transceiver

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Transceiver
application

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 Encoders vs. Decoders

Decoder Encoder

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Binary encoders

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 Need priority in most applications

• Each input request for a service

• If multiple requests simultaneously then need to Priority Encoder
Solution: Assign a Priority to the input lines
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8-input priority encoder

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Priority-encoder logic equations

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74x148 8-input priority encoder

– Active-low I/O
– Enable Input
– “Got Something”
– Enable Output
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 74x148 8-input priority encoder
GS_L is asserted when the
device is enabled and one
or more of the request
inputs are assetred.

EI_L must be asserted for any

of outputs to be assetred.

EO_L is used for cascading.

It is designed to be
connected to the EI_L of
another ‘148 that handles
lower priority requests.
– Active-low I/O
EO_L is asserted if EI_L is
asserted but no request – Enable Input
input is assetred. – Group Select “Got Something”
– Enable Output
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74x148
circuit

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74x148 Truth Table

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 Cascading
priority encoders

• 32-input
priority encoder

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 Multiplexers

s  log 2n

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 74x151
8-input
multiplexer

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74x151 truth table

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 CMOS transmission gates

• 2-input multiplexer

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 Other multiplexer varieties

• 2-input, 4-bit-wide
– 74x157

• 4-input, 2-bit-wide
– 74x153

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Properties of different approaches

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 2-input XOR gates
• Like an OR gate, but excludes the case
where both inputs are 1.

• XNOR: complement of XOR

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 XOR and XNOR symbols

• Any two signals (input or output) of an XOR or

XNOR gate may be complementd without
changing the resulting.
Check with Truth Table!

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 Gate-level XOR circuits
• No direct realization with just a few transistors.

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CMOS XOR with transmission gates

IF B==1 THEN Z = !A;

ELSE Z = A;
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 Multi-input XOR
• Sum modulo 2
• Parity computation

• Used to generate and check parity bits in

computer systems.
– Detects any single-bit error

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 Parity tree
• Faster with balanced tree structure

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