VLSI DESIGN

VLSI DESIGN FLOW

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 The design is taken from specification to fabrication step
by step with the help of various CAD tools.
 Architectural design of a chip is carried out by expert
human engineers.
 Decisions made at this stage affect the cost and
performance of the design significantly.
 Several examples of decisions made during the
architectural design of a microprocessor are given below.
(a) What should be the instruction set of the processor? What
memory addressing modes should be supported? Should the
instruction set be compatible with that of another microprocessor
available in the market?
(b) Should instruction pipelining be employed? If so, what should
be the depth of the pipeline?
(c) Should the processor be provided with an on-chip cache? How
big should the cache memory be? What should be the
organization of the cache? Should instruction cache be
separated from data cache?
(d) Should the arithmetic unit be designed as a bit-serial unit or
as a bit- parallel unit? If bit-serial arithmetic is used, one saves
on hardware cost but loses on performance.
(e) How will the processor interface to the external world? Are
there any international standards to be met?
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 Further design steps depend on the following factors.
(1) How is the circuit to be implemented, on a PCB or as a VLSI
chip?
(2) Are all the components readily available as off-the-shelf
integrated circuits or as predesigned modules?
 If the circuit must be implemented on a printed-circuit
board using off-the-shelf components, then the next stage in
design is to select the components so as to minimize the
total cost and at the same time maximize the performance.
 Following the selection procedure, the IC chips are placed on
one or more circuit boards and the necessary
interconnections are established using one or more layers of
metal deposits.
 A similar procedure may be used in case the circuit must be
implemented on a VLSI chip using predesigned circuit
components from a module library.
 The predesigned modules are also known as macro-cells.
The cells must be placed on the layout surface and wired
together using metal and polysilicon (poly) interconnections.
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 Physical design of a circuit is the phase that precedes the
fabrication of a circuit. In most general terms, physical
design refers to all synthesis steps succeeding logic
design and preceding fabrication.
 These include all or some of the following steps: logic
partitioning, floorplanning, placement, and routing.
 The performance of the circuit, its area, and its reliability
depend critically on the way the circuit is physically laid
out.
Y-CHART
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 Each axis represents type of description
Behavioral
Defines outputs as function of inputs
Structural
Implements behavior by connecting components with
known behavior
Physical
Gives size/locations of components and wires on
chip/board
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 Behavioral Domain
 In this domain, a part of the design (or the whole) is seen as
a black box.
 A behavioral description at the transistor level is, for
example, an equation giving the channel current as a
function of the voltages at source, drain and gate, or the
description of a transistor as ideal switch.
 At a higher level, a design unit with the complexity of several
transistors can easily be described by means of expressions
in Boolean algebra or by means of truth tables.
 Going up in abstraction level, one reaches the register-
transfer level, where a circuit is seen as sequential logic
consisting of memory elements (registers) and functions that
compute the next state given the current memory state.
 The highest behavioral descriptions are algorithms that may
not even refer to the hardware that will realize the
computation described.
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 Structural Domain
 A description in this domain gives information on the sub-
circuits used and the way they are interconnected.
 Each of the sub-circuits has a description in the behavioral
domain or in the structural domain itself (or both).
 A schematic showing how transistors should be
interconnected to form a NAND gate is an example of a
structural description, as this schematic showing how this
NAND gate can be combined with other logic gates to form
some arithmetic circuit.
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 Physical Domain
 A VLSI circuit always has to be realized on a chip which is
essentially two-dimensional.
 This domain gives information on how the subparts that can
be seen in the structural domain, are located on the two-
dimensional domain.
 For example, a cell that may represent the layout of a logic
gate will consist of mask patterns that forms the transistors
of this gate and the interconnections within the gate.
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 The design flow starts from the algorithm that describes
the behavior of the target chip.
 The corresponding architecture of the processor is first
defined. It is mapped onto the chip surface by floor
planning.
 The next design evolution in the behavioral domain
defines finite state machines (FSMs) which are
structurally implemented with functional modules such
as registers and arithmetic logic units (ALUs).
 These modules are then geometrically placed onto the
chip surface using CAD tools for automatic module
placement followed by routing, with a goal of
minimizing inter- connects area and signal delays.
 The third evolution starts with a behavioral module
description. Individual modules are then implemented
with leaf cells.
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 At this stage the chip is described in terms of logic gates
(leaf cells), which can be placed and interconnected by
using a cell placement & routing program.
 The last evolution involves a detailed Boolean
description of leaf cells followed by a transistor level
implementation of leaf cells and mask generation.
 In standard-cell based design, leaf cells are already pre-
designed and stored in a library for logic design use.
ABSTRACTION LEVELS
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 The model divides the whole design cycle into various
domains with such an abstraction through a division
process the design is carried out in different layers.
 The designer at one layer can function without bothering
about the layers above or below.
 The thick horizontal lines separating the layers in the
figure signify the compartmentalization.
 As an example, let us consider design at the gate level.
 The circuit to be designed would be described in terms
of truth tables and static tables.
 With these as available inputs, it has to express them as
Boolean logic equation and realize them in terms of
gates and flip-flops.
 In turn these form the inputs to the layer immediately
below.
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 Compartmentalization of the approach to design in the
manner described here is the essence of abstraction; it is
the basics for the development and use of CAD tools in
the design at various levels.
 VLSI DESIGN METHODOLOGIES
 Systematic design methods (called design methodologies)
are necessary for successfully designing complex digital
hardware.
 Different design methodologies differ in their choice of
number and levels of design abstractions used during
the design process and the manner of constraints on the
translations between the abstraction levels.
 These constraints are usually in the form of use of a
particular structure type at the lower level of design
abstraction while translating the design description that
exists at a higher level of abstraction.
 For example, while translating from the logic level
abstraction to physical level, popular design
methodologies are :
1. FPGA.
2. Gate-Array.
3. Standard-Cell.
4. Full-Custom.
 FPGA
 An FPGA (Field Programmable Gate Array) also consists
of a two-dimensional array of logic blocks. Each logic
block can be programmed to implement any logic
function of its inputs. Thus they are usually referred to
with the name configurable logic blocks (CLBs).
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 The channels or switchboxes between logic blocks contain
interconnection resources.
 The interconnection resources, (or simply interconnect)
consist of wire segments of various lengths.
 These interconnects contain programmable switches that
serve to connect the logic blocks to the wire segments, or
one wire segment to another.
 Furthermore, I/O pads are confined to the array
periphery and are programmable to be either input or
output pads.
 The main design steps when using FPGAs to implement
digital circuits are
(1) mapping of the initial logic description of the circuit
into a netlist of CLBs, (technology mapping),
(2) assigning to each CLB in the netlist, a corresponding
CLB in the array (placement),
(3) interconnecting the CLBs of the array (routing), and
finally,
(4) generating the bit patterns to ensure that the CLBs
perform the assigned function and are interconnected as
decided by the routing step.