ADCS

BOOLEAN ALGEBRA (1)

Definition
 “An algebra of logic used in the design
of digital logic circuitry”.
 “The logic circuitry implements a
‘boolean function’ defined as follows:
i. a set of ‘boolean variables’ are taken
as independent variables with possible
values of ‘0’ or ‘1’.
ii. another boolean variable is assigned
the role of a dependent variable.
iii. a rule is formulated which assigns a
value to the independent variable for
each set of values of independent
variables.

CS254/0402/V1.1 Lesson 4-1

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Basic Structure of a Truth

Table
Inputs Ouputs
All possible
combinations

 For a 4-input variables Truth Table

Output
A B C D Function, F
0 0 0 0
0 0 0 1
0 0 1 0
0 0 1 1
0 1 0 0
0 1 0 1
0 1 1 0
24 = 16 0 1 1 1
combinations 1 0 0 0
1 0 0 1
1 0 1 0
1 0 1 1
1 1 0 0
1 1 0 1
1 1 1 0
1 1 1 1

CS254/0402/V1.1 Lesson 4-2

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Uses of Truth Tables

 Based on a given boolean

expression
 Obtain the output for different
inputs
 Given desired outputs
 Determine the expression needed
in order to obtain the outputs

CS254/0402/V1.1 Lesson 4-3

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Boolean Operators
 “AND” Operator

 The “AND” operator:

 Operates on 2 or more variables

 Output 1 when all the inputs are 1’s

 Represented by “.”

 “AND” operation truth table:

A B C = A.B
0 0 0
0 1 0
1 0 0
1 1 1

 Circuit Symbol:
A
C = A.B
B
Inputs Output
 “AND” gate can have 2 or more
inputs
CS254/0402/V1.1 Lesson 4-4
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 “OR” Operator

 The “OR” operator:

 Operates on 2 or more variables

 Output 1 when any or all inputs are

1’s

 Represented by “+”

 “OR” operator truth table:

A B C=A+B
0 0 0
0 1 1
1 0 1
1 1 1

 Circuit Symbol:
A
C = A.B
B
Inputs Output

 “OR” gate can take 2 or more

inputs
CS254/0402/V1.1 Lesson 4-5
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 “NOT” Operator

 The “NOT” operator:

 Operates on a single variable

 Produces opposite binary state of

input

 Represented by “-” (e.g. A ) or “ ’ ”

(e.g. A’)

 “NOT” operator truth table:

A A
0 1
1 0

 Circuit Symbol:
A A

Inputs Output

 “NOT” gate can have only 1 inputs

CS254/0402/V1.1 Lesson 4-6
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 “NAND” Operator

 The “NAND” operator:

 Operates on 2 or more variables

 Output 0 when all inputs are 1’s

 Performs AND then NOT function

 “NAND” operator truth table:

A B C = A.B
0 0 0
0 1 0
1 0 0
1 1 1

 Circuit Symbol:
A
C = A.B
B
Inputs Output
 “NAND” gate can have 2 or more
inputs
CS254/0402/V1.1 Lesson 4-7
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 “NOR” Operator

 The “NOR” operator:

 Operates on 2 or more variables

 Output 0 when any or all inputs are

1’s

 Performs OR then NOT function

 “NOR” operator truth table:

A B C=A+B
0 0 1
0 1 0
1 0 0
1 1 0
 Circuit Symbol:
A
C=A+B
B
Inputs Output
 “NOR” gate can have 2 or more
inputs
CS254/0402/V1.1 Lesson 4-8
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 “XOR” / “EX-OR” Operators

 The “XOR” / “EX-OR” operator:
 Operates on 2 variables
 Output 1 when inputs are not equal
(ie. It is a non-equivalence gate)
 Represented by “”
 “XOR” operator truth table:
A B C = A  B = AB + AB
0 0 0
0 1 1
1 0 1
1 1 0

 Circuit Symbol:
A
C=AB
B
Inputs Output
 “XOR” gate can only have 2 inputs

CS254/0402/V1.1 Lesson 4-9

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 “XNOR” / “EX-NOR” Operators

 The “XNOR” / “EX-NOR” operator:

 Has 2 input variables

 Output ‘1’ when inputs are equal

(ie. It is a an equivalence gate)

 Represented by A  B or A  B

 “XNOR” operator truth table:

A B C = A  B = A  B = AB + A B
0 0 1
0 1 0
1 0 0
1 1 1

 Circuit Symbol:
A
C=AB
B
Inputs Output
 “XNOR” gate can have only 2
inputs
CS254/0402/V1.1 Lesson 4-10
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 Nand Gate as Inventor

 All inputs are taken lines to the same
variable
(ie. tie all the input lines to the same
variable input)
 Output is inverted

A A

 NOR Gate as Inventor

 All inputs are taken from the same
variable
(ie: tie all the input lines to the same
variable input)
 Output is inverted
A A

CS254/0402/V1.1 Lesson 4-11

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 Conclusion

CS254/0402/V1.1 Lesson 4-12

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De Morgan’s Theorem

 Steps

 Invert all input variables

 Change “AND” operators to “OR”

operators and “OR” operators to
“AND” operators

 Example

F = A + BC + BCD + AB
= A (B + C) (B + C D) (A +B)

CS254/0402/V1.1 Lesson 4-13

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Dual Functions of a NAND

Gate (1)
 From De Morgan’s Theorem, we
know
A+B=A.B
 given F = A + B
= A+B
= A.B
(from De Morgan's Theorem)

+...2
CS254/0402/V1.1 Lesson 4-14
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Dual Functions of a NAND

Gate (2)
 Occurrence of A + B can be replaced by:
A.B
 NAND gate is performing OR function
 3 NAND gates needed to realize the OR
function
 Circuit Symbols:

A
F=A.B
B

A
F=A+B
B
 Truth Table:

A B A B F=A.B
0 0 1 1 0
0 1 1 0 1 OR function
1 0 0 1 1 A+B
1 1 0 0 1

CS254/0402/V1.1 Lesson 4-15

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Dual Functions of a NOR

Gate (1)
 From De Morgan’s Theorem we know

A.B=A+B
 given F = AB
= AB
= A+B
(from De Morgan's Theorem)
 Occurrence of AB can be replaced by:
A+B
 NOR gate is performing AND function
 3 NOR gates needed to realize the
AND function

+...2
CS254/0402/V1.1 Lesson 4-16
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Dual Functions of a NOR

Gate (2)
 Circuit Symbols:

A
F=A+B
B

A
F=A.B
B

 Truth Table:

A B A B F=A+B
0 0 1 1 0
0 1 1 0 0 AND function
1 0 0 1 0 A.B
1 1 0 0 1

CS254/0402/V1.1 Lesson 4-17

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NAND Gate -
UNIVERSAL Gate
 AND Function

A A.B
A.B
B

 Or Function

A
A
A+B
B
B
 Inverter Function

A A

CS254/0402/V1.1 Lesson 4-18

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NOR Gate -
UNIVERSAL Gate
 AND Function
A
A
A.B
B
B

 Or Function

A A+B
A+B
B

 Inverter Function

A A

CS254/0402/V1.1 Lesson 4-19

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AND Operation On Variables

 Gives a product term

 Example
A
B A.B.C PRODUCT
C TERM

 Minterm
 A product term that continues all
the variables or their inverses
 Example

A B C D is a minterm
(it is also a product term)

A C D is not a minterm
(it is a product term)

CS254/0402/V1.1 Lesson 4-20

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OR Operation On Variables

 Gives a sum term

 Example
A
B (A + B + C) SUM TERM
C

 Maxterm
 A sum term that continues all the
variables or their inverses
 Example

(A + B + C + D) is a maxterm
(it is also a sum term)

(A + C + D) is not a maxterm
(it is a sum term)

CS254/0402/V1.1 Lesson 4-21

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Some Application

Decimal To Binary Encoder

 The desired decimal code is
selected by closing the switch.
The corresponding binary
pattern appears as output y3 y2
y1 y0

5v

0
1
2
3
4
5
6
7
8
9

y3 y2 y1 y0

CS254/0402/V1.1 Lesson 4-22

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AND Gate To Block /

Transmit Data
 The “ENABLE” controls the
contents of the register from
appearing on output y3 y2 y1 y0

Register
(4 Bits)

ENABLE

y3 y2 y1 y0

CS254/0402/V1.1 Lesson 4-23

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Binary to Decimal or
Instruction Decoder
 Depending upon the binary
content of the register one of the
AND gate output is selected.

Register
(2 bit)

y0

y1

y2

y3

CS254/0402/V1.1 Lesson 4-24

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Odd Parity Tester /

Generator
 XOR output = 1 when register
contains odd number of 1’s

Register

XOR

Test odd parity

Generate odd parity bit

CS254/0402/V1.1 Lesson 4-25

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Controller Inverter

Register

INVERT

XOR XOR XOR XOR

y3 y2 y1 y0
 When ‘INVERT’ is high, the
register contents are
complemented & appear at y3 y2
y1 y0

CS254/0402/V1.1 Lesson 4-26

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Sum-Of-Product Expression

 Function is expressed as the

canonical sum of minterms
 Example

f(A,B,C) = (0, 1, 3, 7)
= ABC +ABC+ABC+ABC
 Each product term must be a
minterm

CS254/0402/V1.1 Lesson 4-27

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Sum-Of-Product Expression

 Function is expressed as the

canonical product of maxterms
 Example
f(A,B,C) = (0, 5, 6)
= (A + B + C) (A + B + C)
(A + B + C)
 Each sum term must be a maxterm

CS254/0402/V1.1 Lesson 4-28

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Sum-Of-Product (SOP)
Expression
 Example
f(A,B,C) = AB+AC+ABC

Note: Function F is not a canonical

sum-of-minterms form because at least
one of the product term is not a minterm.

Product-Of-Sums (POS)
Expression
 Example

f(A,B,C) = (A + B) (A + C) (A + B + C)
Note: Function F is not a canonical
sum-of-maxterms form because at least
one of the sum term is not a maxterm.

CS254/0402/V1.1 Lesson 4-29

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Example (1)
Minterm Product Output
Number Term A B C f(A, B, C)

mo ABC 0 0 0 1
m1 ABC 0 0 1 1
m2 0 1 0 0
m3 ABC 0 1 1 1
m4 1 0 0 0
m5 1 0 1 0
m6 1 1 0 0
m7 ABC 1 1 1 1

 Sum-Of-Minterms form

f(A, B, C) = m0 + m1 + m3 + m7
= ABC +ABC+ABC
+ABC
f(A, B, C) = (0, 1, 3, 7)

+...2
CS254/0402/V1.1 Lesson 4-30
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Example (2)

 m = minterm

 Two level AND-OR implementation

ABC
 Each term, e.g. is a product
hence the name SUM-OF-
PRODUCTs

 Sum-Of-minterms form is also

Sum-Of-Products form; but Sum-
Of-Products form does not imply it
is Sum-of-minterms form.

CS254/0402/V1.1 Lesson 4-31

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Example (1)
Minterm Product Output
Number Term A B C f(A, B, C)

mo ABC 0 0 0 1
m1 ABC 0 0 1 1
m2 0 1 0 0
m3 ABC 0 1 1 1
m4 1 0 0 0
m5 1 0 1 0
m6 1 1 0 0
m7 ABC 1 1 1 1

 Product-Of-Maxterms form

f(A, B, C) = M0 M1 M3 M7

= (A + B + C) (A + B + C)
(A + B + C) (A + B + C)
f(A, B, C) = (0, 1, 3, 7)

+...2
CS254/0402/V1.1 Lesson 4-32
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Example (2)

 M = maxterm

 Two level OR-AND implementation

 Each term, e.g. (A + B + C) is a

sum hence the name PRODUCT-
OF-SUMs

 Product-Of-maxterms form is also

Product-Of-Sums form; but
Product-Of-Sums form does not
imply it is Product-of-maxterms
form.

CS254/0402/V1.1 Lesson 4-33

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SOP Expression
From Truth Table
 Sum all the products terms where
the output = 1

Given the truth table

A B C Output (F)
0 0 0 0
0 0 1 1
0 1 0 1
0 1 1 1
1 0 0 0
1 0 1 0
1 1 0 1
1 1 1 1

 Write out the SOP form for F.

F = ABC+ABC+ABC
+ABC+ABC

CS254/0402/V1.1 Lesson 4-34

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POS Expression
From Truth Table
 Obtain the products for terms
where the output = 0

Given the truth table

A B C Output (F)
0 0 0 0
0 0 1 1
0 1 0 1
0 1 1 1
1 0 0 0
1 0 1 0
1 1 0 1
1 1 1 1

 Write out the POS form for F.

F = (A + B + C) (A + B + C)
(A + B + C)

CS254/0402/V1.1 Lesson 4-35