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8253/8254 – PROGRAMMABLE

INTERVAL TIMER
Used as a timer interface to INTEL processors
Introduction
2

 Has 3 counters; Counts in SIX different


modes
 Each counter has two inputs – GATE,
CLK; and 1 output – OUT
 Fourth register is CWR
 Hence, as expected, 2 address lines A1
and A0 are used to select one of these
Dr. D. Muralidharan 4/9/19
four registers
Block diagram and pin-out
3

Dr. D. Muralidharan 4/9/19


Selected operations
4

As you can see,


there is no “read
control word”
option

Dr. D. Muralidharan 4/9/19


Some words about counters
5

 They are independent


 16 bit down counters
 Pre-settable
 Count either in binary (Hexa) mode or in
BCD mode

Dr. D. Muralidharan 4/9/19


Now time to see control word
register
6

Control word size is 8 bit;


Hope you remember data bit
size is also 8 bit only

Dr. D. Muralidharan 4/9/19


Control word register
definition cnt…
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Dr. D. Muralidharan 4/9/19


Operating modes
8

1. Mode 0 – Interrupt on terminal count


2. Mode 1 – Programmable monoshot
3. Mode 2 – Rate generator
4. Mode 3 – Square wave generator
(approx)
5. Mode 4 – Software triggered strobe
6. Mode 5 – Hardware triggered
Dr. D. Muralidharan 4/9/19strobe
MODE 0
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Dr. D. Muralidharan 4/9/19


MODE 0
10

 Out is initially high and goes low when a value is


loaded
 Count value is considered only in the falling edge
 Decrements the value at the next falling edges
 When the count is zero, out goes high and be in the
position until another value is loaded
 Stop to decrement and retain the value when gate = 0
 Erase the previous count when a new count is loaded
Dr. D. Muralidharan 4/9/19
MODE 1
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Dr. D. Muralidharan 4/9/19


Difference b/w Mode 0 & MODE 1
12

 When we load a new value, that is neither


accepted nor the counting stops
 When gate goes low and comes up, counting
starts from the newly loaded value or
counting restarted from the original value
 Similar to mode 0, when gate is low, no
counting process
Dr. D. Muralidharan 4/9/19
Mode 2
13

Coincidence?
8051 is also
auto reloaded in
mode 2
N-1 cycles OUT
= H.
Nth cycle OUT =
L
Repeats
endlessly
Gate = L, waits
Dr. D. Muralidharan 4/9/19 until gate is high
MODE 3
14

Duty cycle is either N/2N (50 percent –Square wave – when N is even)
or (N+1)/2N (more than 50 percent – NOT a perfect square wave –
When N is odd

Dr. D. Muralidharan 4/9/19


MODE 4
15

 After accepting the


count value OUT =
H for N cycle
 Goes low for one
cycle
 Similar to other
modes Gate may
inhibit counting

Dr. D. Muralidharan 4/9/19


MODE 5
16

 This is very similar to


mode 4

 Gate is used to
trigger the count (of
course, it is used in all
modes. Here it is zero
initially and it triggers
the operations by
changing the state)

Dr. D. Muralidharan 4/9/19


Sample program
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Dr. D. Muralidharan 4/9/19

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