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Fundamentals

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Fundamentals

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Under equilibrium

Since E = −dV/dx,

Dividing both sides by p &

taking the integral,

=VT

Built-in-potential equation can be re-arranged as,

majority carrier concentration remains relatively constant

Carrier profile in equilibrium Carrier profile under FB

np and pn increases

Results in proportional increase in diffusion

current

Change in the hole concentration on the n side is;

Similarly, for the electron concentration on the p side

We have =VT

in rise in diffusion currents by a proportional amount

current” and is given by

‘A’ cross section area of the device

Ln and Lp electron and hole “diffusion lengths”

Problem: A silicon pn junction has

NA = 2 × 1016 cm−3 and

ND = 4 × 1016 cm−3,

A = 100μm2,

Ln = 20μm,

Lp = 30μm,

ni(T = 300 K) = 1.08 × 1010 cm−3,

q =1.6 ×10−19 C,

Dn = 34 cm2/s and

Dp = 12 cm2/s

Determine

(i) built-in potential at room temperature

(ii) hole & electron concentrations on the two sides

(iii) IS

(768mV)

pp ≈ NA pn ≈ ni2/ND

np ≈ ni2/NA

nn ≈ N D (1.77 × 10−17A)

BJT can modeled as a voltage-dependent current source

Negative sign indicates input & output are out of phase by 180º

AV depends on

K of the controlled current source

load resistor

K signifies how strongly V1 controls I1

emitter “emits” charge carriers

collector “collects” them

base controls the flow of carriers from emitter to collector

active region

base-emitter junction is forward biased (VBE > 0)

base-collector junction is reverse-biased (VBC < 0)

reverse biased D2 does not

current flow from the B to E

no current through the collector terminal

With E-B junction forward-biased,

electrons flow from E to B

holes flow from B to E

former current must be > the later

To achieve this

emitter is doped much heavily than base

most of the electrons reach the edge of the C-B depletion

region before getting recombined in the base region

collector region

resulting in a current through reverse biased C-B junction

Carrier profiles

away,

the density of electrons falls to zero at

x = x2

provides a gradient for the diffusion of

electrons

Collector Current

With emitter doping of NE &

base doping of NB

We can write;

Current Density

section area (AE),

and then substituting for Δn(x1)

and changing the sign to obtain the conventional current,

we obtain

assuming exp(VBE/VT)>>1, we write

Where

BJT indeed operates as a voltage controlled current source

does not depend on the collector voltage

as a current source

Q1 and Q2 are identical and operate in the active mode with V 1

= V2. Determine the current IX

Collector current of a single transistor having an emitter

area of 2AE

or by connecting BJTs in parallel which are smaller in area

Q1 and Q2 are identical and operate in the active mode.

Determine V1 − V2 such that IC1 = 10IC2.

increase in the current

VTln(n) in VBE

base-emitter voltage is considered constant and 0.8V

Discrete BJT have a typical area of 500μm×500μm, whereas

modern integrated devices have a typical area of 0.5μm×0.2μm.

Assuming other device parameters are identical, determine the

difference between VBE of two such transistors for equal collector

currents.

Denoting VBE of discrete & integrated circuit BJT as VBEint & VBEdis,

In the circuit assuming IS=5×10−16A determine the output voltage.

IC=1.69mA

Electrons injected by the emitter, as they travel through the base,

some may “recombine” with the holes resulting in a base current

or a constant fraction of IC

β is called the “current gain” of the transistor

For =100, we get =0.99, thus, IC IE.

A bipolar transistor having IS = 5×10−16A is biased in the active

region with VBE = 750mV. If the current gain () varies from 50 to

200 due to manufacturing variations, calculate the minimum and

maximum terminal currents of the device.

IC = ISexp(VBE/VT) = 1.685mA

IE varies only by a small fraction

Since the B-E junction is forward-biased in the active mode,

We can place a diode between the B and E terminals

Since the current drawn from the collector and flowing into

the emitter depends only on VBE

collector and the emitter

The resulting BJT model is;

can be used for arbitrarily large voltage & current changes in

the transistor giving the name “Large-Signal Model”

To ensure the current flowing through the diode = I C/β

Since IB=IC/=[ISexp(VBE/VT)]/,

cross section area is 1/β times that of the actual emitter area

In the circuit IS,Q1 = 5×10−17A and VBE = 800mV. Assume β = 100.

(a) Determine the transistor terminal currents and voltages

and verify that the device indeed operates in the active mode.

(b) Determine the maximum value of RC that permits operation

in the active mode.

IC = ISexp(VBE/VT) = 1.153mA

IB = IC/ = 11.53A

IE = IB + IC = 1.165mA

the transistor operates in the active mode

if VX drops to 800mV the junction will be just in active region

I/V Characteristics

(i) IC versus VBE with B-C junction reverse biased

(ii) IC for a given VBE with varying VCE (VCE > VBE)

a horizontal line

For different values of VBE, the characteristic moves up or down

How best is the BJT ‘as a voltage-dependent current source’?

output current

produced in the collector current?

of the device by ΔIC/ΔVBE

called the trans conductance (gm) of the BJT

gm=dIC/dVBE

we get, gm = 0.0385 −1

= 0.0385℧

= 0.038A/V

= 0.038S

gm could be visualized as the slope of IC -VBE characteristic at a given

collector current IC0 and the corresponding base-emitter voltage VBE0

then the collector current displays a change of ±g mΔV around IC0,

where gm = IC0/VT

gain

of IC0,

In the circuit what happens to the transconductance of Q1 if the

area of the device is increased by a factor of n?

each carrying a collector current of IC0 connected in parallel

In the context of the IC -VCE characteristics with VBE as a parameter

around IC1 because gm2 > gm1

Small-Signal Model

It could be reduced to a linear device

current source of gmΔVBEmust be connected between C & E

With change in VBE, ΔIB = ΔIC/β = gmΔVBE/β

(gm/β)ΔVBE

terminal with rπ = ΔVBE/ΔIB = β/gm

Apply a voltage change at collector with respect to the

emitter

IC = IS exp(VBE/VT)

IB = IC /β

gm=IC/VT and rπ = β/gm = βVT/IC

depend on the bias current of the device

lower rπ

In the circuit v1 represents the signal generated by a microphone,

IS = 3×10−16A, β = 100, and Q1 operates in the active mode.

(a) If v1 = 0, determine the small-signal parameters of Q1.

(b) If the microphone generates a 1mV signal, how much change is

observed in the collector and base currents?

gm = IC/VT = 0.266 -1

rπ = β/gm = 376

small-signal equivalent circuit is

(b) From circuit

vπ = v1

Practically the circuit is of no use

resulting current flows through the 1.8V battery producing

no output

output could be provided

the speaker resistance acts as the resistor

Early Effect

can limit the gain of amplifiers

Our assumption was “IC is independent VCE”

it is known as Early Effect

IC and VCE are related by

but with a somewhat greater slope

For a constant VBE, the IC − VCE characteristic displays a

nonzero slope

BJT does not operate as an ideal current source

BJT could be viewed as a two-terminal device

but with a current that varies to some extent with V CE

The large-signal model is modified as,

where

small-signal model

Similarly,

Considering IC varies with VCE,

Both rπ and rO are inversely proportional to IC

A transistor is biased at a collector current of 1mA.

Determine the small-signal model if β = 100 and V A = 15V

gm=IC/VT=0.038 -1

rπ=/gm=2.63k

ro=VA/IC = 15 k

BJT has IC = 1mA with VCE = 2V. Determine VBE if VA =∞ and

VA = 20 V. Assume IS = 2×10−16A

Saturation Mode

transistor said to be biased in the “saturation region”

carries an extremely small current

device is said to be in “soft saturation”

If VCE drops further, the B-C junction experiences greater

forward bias, carrying a significant current

terminal;

as a consequence it looks as if β is reduced

and hence a rapid fall in β

BJT is biased with VBE = 750mV and has β = 100. How much B-C

forward bias can the device tolerate if β must not degrade by

more than 10%? For simplicity, assume B-C and B-E junctions

have identical structures and doping levels

If the C-B junction is forward-biased such that it carries a current

equal to one-tenth of the nominal base current, IB,

β degrades by 10%

the B-C junction should carry a current not more than IC /1000

determine B-C voltage that results in a current of IC /1000

Assuming identical B-E and B-C junctions, we have,

= VT ln1000

= 180mV

VBC = 570mV

The BJT model can be re-constructed as

because part of the controlled current IS1 exp(VBE/VT) is now

supplied by the B-C diode

In the deep saturation, the C-E voltage approaches a

constant value called VCEsat (0.2V)

to a controlled current source and can be modeled as a

battery tied between C and E

For the circuit determine the relationship between RC and VCC

that guarantees operation in soft saturation or active region

VC must not fall below the VB by more than 200 mV

so that VCC − ICRC still maintains a reasonable collector voltage

A transistor with IS = 6 × 10−16 A must provide a gm of 1/13.

What base-emitter voltage is required?

gm=IC/VT

and R1 = 5 k, compute VB such that IX = 1 mA.

IX=IS1exp(VBE/VT) VBE=

IY=IS2exp(VBE/VT) =

IB1=IX/ 1 =

IB2=IY/ 2 =

VB=(IB1+IB2)R1+VBE =

In the circuit determine the maximum value of V CC that

places Q1 at the edge of saturation. Assume I S = 3 × 10−16 A.

Collector Voltage VC = Base Voltage VB

VCC=ICRC + VC IC = ISexp(VB/VT)

VCC= RCISexp(VB/VT) + VB

of Q1. Assume IS = 8 × 10−16 A, β = 100, and VA =∞.

IB=10A = [ISexp(VBE/VT)]/ β VBE=

IC= βIB = gm= Ic/VT =

IE=IC+IB = r= /gm =

r0=

Base Voltage VB= VBE + IE1k =

Collector Voltage VC = 2V VCB= VC - VB =

In the circuit, I1 is a 1mA ideal current source and IS = 3×10−17

A. (a) Assuming VA =, determine VB such that IC = 1 mA.

(b) If VA = 5 V, determine VB such that IC = 1mA for VCE=1.5 V.

(b) VB =

produces a forward bias of VBC=200mV. Assume IS = 7×10−16A

and VA = . V =I 1k = 200mV I = 0.2mA

BC C C

In the circuit IS1 = IS2 = 3×10−16 A.

(a) Calculate VB such that IX = 1 mA

(b) With the value of VB found in (a), find IS3 such that IY = 2.5 mA

1.5=VBE + (IC+IB) 1k

1.5VBE + IC 1k

1.5VBE + IS exp(VBE/VT) 1k

VX IC1k =

In the circuit, n identical transistors are in parallel. IS=5×10−16A

and VA = 8 V for each device, construct the small-signal model

of the equivalent transistor.

Amplifier with a voltage gain of 10 senses a signal generated by a

microphone and applies the amplified output to a speaker

and a series resistance of 200 .

(a) Determine the signal level sensed by the amplifier if the circuit

has an input impedance of 2k or 500.

(b) Determine the signal level delivered to the speaker if the circuit

has an output impedance of 10 or 2

Signal level sensed by the amplifier V1 = Vm[Rin/(Rin+Rm)]

Vout = Vamp[RL/(RL+Ramp)]

When Ramp = 2; Vout = 0.8Vamp 20% loss

Measuring I/O impedances

Impedance = VX/IX

Assuming that the transistor operates in the active region,

determine the input impedance.

higher β or

lower IC yield a higher input impedance

Neglecting the Early effect calculate the impedance seen

at the emitter of Q1

Calculate the impedance with respect to collector of Q1

Since vπ = 0, gmvπ = 0

Rout = rO

With Emitter grounded,

looking into the base,

we see rπ

looking into the collector,

we see rO

Early effect is neglected,

looking into the emitter,

we see 1/gm

In the circuit shown IS=6×10−16A and the peak value of the

microphone signal is 20 mV, determine the peak value of the

output signal.

Connecting base to VCC gives required base bias

change introduced by the microphone

VCC= RBIB + VBE

To avoid saturation

For the circuit determine the collector bias current to

avoid. β = 100 and IS = 10−17 A. Verify that Q1 operates in

the active region.

Assuming VBE = 800mV

saturation modes

Because VCC − VBE determines IB,

variations

IC depends on β,

In the previous example, if β increases from 100 to 120,

IC rises to 1.98 mA

and VCE falls to 0.52, driving the transistor to saturation

If the base current is neglected

In the circuit determine IC. Given IS = 10−17 A and β = 100.

Verify that the base current is negligible and the transistor

operates in the active mode.

Thevenin's

Equivalent

Circuit is

Calculate IC. Assume β = 100 and IS = 10−17A

After many iterations, VBE≈766mV and IC=63μA

Biasing with Emitter Degeneration

Calculate the bias currents and verify that Q1 operates in the

active mode. Assume β =100 and IS = 5×10−17A. How much does

IC change if R2 is 1% higher than its nominal value?

VBE = 796mV

How much does IC change if R2 is 1% higher than its nominal

value?

VX = 906mV

IE = VP/RE=1.06mA

This biasing is extensively used in discrete circuits and

occasionally in integrated circuits

I1>>IB to make the circuit less sensitive to β

VRE must be large to suppress the variations in V X and VBE

RC must be small enough to avoid BJT satuation

Design Procedure

(2) Based on the expected variations of R1, R2, and VBE, choose a

value for VRE ≈ ICRE, say 200 mV

Design the circuit to provide a gm of 1/52. Assume VCC = 2.5V,

β=100, and IS=5×10−17A. Determine the maximum value of RC

gm= IC/VT IC=0.5mA

IB =IC/=5A

Assuming VRE= 200mV;

VRE =ICRE RE=400

VX VBE+VRE =978mV

IB =5A

I1=VCC/(R1+R2) = 50A

R1+R2 = 50k

R2 = 19.5k

R1= 30.5k

VCC−RCIC>VX RC<3k

Redesign the circuit to provide a gm of 1/52. Assume VCC =

2.5V, β=100, and IS=5×10−17A. Determine the maximum value

of RC. Assume VRE= 500mV and I1≥100IB

gm= IC/VT IC=0.5mA

IB =IC/=5A

Assuming VRE= 500mV;

VRE =ICRE RE= 1k

VX VBE+VRE =1.278V

IB =5A

I1=VCC/(R1+R2) = 500A

R1+R2 = 5k

R2 = 2.5k

R1= 2.5k

VCC−RCIC>VX RC<2.4k

Reduction in RC translates to a lower voltage gain

Ri Ri1

Self-Biased Stage

VX = VY − IBRB

device and circuit parameters

Determine the IC and VY. RC=1k, RB=10 k, VCC=2.5V, IS=5×10−17A,

and β = 100. Assuming VBE = 0.8 V. Repeat the calculations for

RC=2k.

= 1.545mA

= 0.807V

VY = RBIB+VBE = 0.955 V

VBE=0.791V

VY=0.872V

Design Guidelines

If RC>>RB/β,

we choose

Design the self-biased circuit for gm=1/13 and VCC=1.8V.

Assume IS=5×10−16A and β = 100.

VBE=754mV

RC=475

RB=4.75k

Common-Emitter Topology

Gain is negative

Since lowering the limit to VRC < VCC,

Design a CE amplifier with VCC=1.8V and a power budget, P=1mW

while achieving maximum voltage gain. Use VBE=0.8V.

P = ICVCC=1mW IC = 0.556 mA

Input of 2-mV p-p results in a 77-mVpp output, forward-biasing

the B-C junction for half of each cycle

amplifies properly

more aggressive design is to allow BJT to operate in soft

saturation, e.g., VCE ≈ 400mV

Input of 2-mV p-p signal gives 107.8-mV p-p output, driving BJT

into heavy saturation

and voltage headroom

Rin decreases as IC increases

A CE stage must have input impedance of Rin

output impedance of Rout.

What is the voltage gain of the circuit?

then the voltage gain is automatically set

CE stage with Early Effect

Av = −gm(RC ||rO)

Rin = r

Rout = ro//RC

The circuit is biased with a IC of 1 mA and RC = 1 k. If β = 100 and

VA=10 V, determine the small-signal voltage gain and the I/O

impedances.

CE stage with Early Effect

No external load; RC

“current gain,” AI = iout/iin

= gm/r =

= [gm/r] ro/(ro+RC)

= ro/(ro+RC)

CE Stage With Emitter Degeneration

With β>>1, we can assume gm>>1/rπ

resistance seen at the collector to ground divided by 1/gm

plus the total resistance placed in series with the emitter”

If gmRE>>1 Av = −RC/RE Av is independent of BJT parameters

Determine the voltage gain

A CE stage IC = 1mA, AV = 20 no emitter degeneration and 10 with

degeneration, determine RC , RE, and the I/O impedances. Assume

β = 100

RC = 520

With degeneration = 10

1 + gmRE = 2 RE = 26

Rout = RC = 520

Compute the voltage gain and I/O impedances.

Assume a very large value for C1

replaced by short circuit

open circuit

One additional term in the denominator = RB/(β+1)

A microphone has an output resistance of 1k,

peak signal level of 2 mV.

Design a CE stage that amplifies this signal to 40 mV. Use IC=1 mA,

RE=4/gm and β=100

RE = 426 = 104

≈ 2.8 k

Determine the voltage gain and I/O impedances. Assume a very

large value for C1 and neglect Early effect.

For RE >> rπ, we have RE||rπ rπ

output resistance to emphasize its significance

Design a current source having a value of 1 mA and an output

resistance of 20 k. For BJT β=100 and VA=10V. Determine REmin

rO = VA/IC = 10 k

1 + gmRE = 2

Calculate the output resistance

We have

Determine the output resistance

CE Stage with Biasing

this problem

What happens if speaker resistance is 8?

VC =VCC(8)/[1k+8] = 8mV

Coupling capacitor C2

overcomes this problem

|Av| = gm(RC ||RSpeaker)

How to have degeneration to biasing

but not to the signal?

Design the circuit to satisfy with: IC=1mA, VRE=400mV, AV=20 in

the audio frequency range (20Hz to 20 kHz), Ri > 2k. Assume β=

100, IS=5×10−16, and VCC=2.5V

IC=1mA ≈ IE and VRE=400mV

RE = 400

For gain to be unaffected by

degeneration;

Let it be < 0.1(1/gm)

IB=IC/ = 10μA;

to lower sensitivity to β

current flowing through R1 and R2 = 100μA

Current through R1 and R2 be 5IB = 50μA

Common-Base Topology

Voltage output of an electronic thermometer is 600mV at

room temperature. Design a CB stage amplify the voltage

change with maximum gain. Assume VCC =1.8V, IC=0.2mA,

IS=5×10−17A, and β = 100.

generating Vb

R1 + R2 = 90 k

Input and Output Impedance

With base grounded,

Early effect neglected,

rπ = β/gm >> 1/gm,

we see 1/gm

output impedance of Rout. Neglecting the Early effect, determine

the Av.

Rout = RC ,

which on flowing through RC , yields

A C-B stage is designed to amplify an RF signal received by a 50

antenna. Determine the required bias current if the Rin must

“match” the impedance of the antenna. Determine AV if the C-B

stage also drives a 50 load. Assume VA =.

driving a 50 load directly

RB = 0 but VA <

Gain with VA = and RB 0

>1

Will this circuit function?

No dc path for IE

zero bias current

Zero gm

vout = 0

If ; amplifier current will > current through RE;

Design a CB stage for AV = 10, Rin = 50. Assume IS = 5×10−16 A,

VA =, β = 100, and VCC = 2.5V.

Vb = IERE + VBE = 1.16 V

R1=25.8k

|C1ω|−1 = (1/gm)/20 C1=71pF R2=22.3k

Emitter Follower

Determine AV. Current source is ideal and VA =

Av = 1

VBE = VT ln(IC /IS) is constant

VBE = Vin − Vout

Rthev = 1/gm

open-circuit output voltage

produced byQ1

CC stage with RE =

Vout = Vin

Determine the voltage gain of a emitter follower driven by a finite

source impedance of RS Assume VA =.

RThev=

VThev= Vin

CC stage : Input and Output Impedance

Input Impedance

thereby serving as an efficient “buffer”

Output Impedance

A CE stage has a AV = 20, Rout=1k. Determine AV if,

(a) The stage drives an 8 speaker directly.

(b) An emitter follower biased at a current of 5 mA is placed

between the CE stage and the speaker.

Assume β =100, VA=, and CC stage is biased with an ideal

current source.

20=gm1k gm=20m

AV after connecting speaker = gm(RC//Rsp)

AV=20m(1k//8) AV=0.16

= gm(RC//Rin1)

AV=20m(1k//1.328k) AV=11.4

CC stage : Input and Output Impedance

Determine the small-signal properties of a CC stage using an

ideal current source but with a finite source impedance RS

Emitter Follower with Biasing

driving Q1 into saturation

For the CC stage RB = 10k and RE=1k. Calculate the bias current

and voltages if IS=5×10−16 A, β=100, and VCC=2.5V. What happens if

β drops to 50?

IC = 1.545mA

VBE = VT ln(IC /IS) = 0.748V

IC = 1.593mA

IBRB =159mV

ICRE =1.593V

β =50

IC = 1.417mA

VBE = VT ln(IC /IS) = 0.745V

IC = 1.462mA

IBRB =292mV

ICRE =1.462V

Twofold change in β leads <10% change in IC

Assuming VA =, compute the voltage gain

Assuming VA =, compute AV and input impedance

Calculate AV, VA =

Determine the input impedance , VA =

Compute AV and Rout, VA <

Determine AV and I/O impedances. Assume VA = and equal β for

all transistors

The circuit must be designed for maximum AV while maintaining

Q1 in the active mode. If VA = 10V and VBE = 0.8 V, calculate the

required bias current. Assume VCC=2.5V

AV = gm(ro//RC)

Suppose the bipolar transistor in the circuit exhibits the following

hypothetical characteristic: and no Early effect.

AV = gmRC

gm = dIC/dVBE =

The circuit employs an ideal current source as the load. If the Av=

50 and Rout=10k, determine the bias current of the BJT.

AV = gmro = ICro/VT = 50 IC =

AV = -gm1Rout = -gm1[1/gm2]

Rout

Rin = r1

Determine AV, Rin and Rout. Assume VA = .

Rin = r1

Rout1

Rin = r1

Determine AV, Rin and Rout. Assume VA = .

Rout = r2//1/gm2

AV = -gmRout = -gm[r2//1/gm2]

Rout

Rin = r1 Rout = r2//1/gm2

AV = [Vout/Vout1] [Vout1/Vin]

= {-gm[r2//1/gm2]}[1-gm2RC] Vout1

Vout1 Rin = r1 Vout/Vout1 = 1-gm2RC

Rout1 = r2//1/gm2

Rout = RC + [r2//1/gm2]

Design the circuit with AV = 10, Q1 operating at the edge of

saturation. Calculate the bias current and the value of RC if β = 100,

IS = 5×10−16A, and VA =. Calculate Rin

AV = ICRC/(VT+ICRE) = 10

At the edge of saturation; VCE VCC – IC(RC+RE) = VBE

Rin= r + (1+)RE

Determine AV. Assume IS = 7×10−16A, β = 100, and VA = 5 V. (But

for bias calculations, assume VA =).

IB=(VCC-VBE)/[10k+(1+)RE]

I =IB

C

VBE=VTln(IC/IS) =

AV=91k//0.1k//rO)/[1/gm+(1k//0.1k//rO)]

Circuit is a “Darlington pair.” Assume VA = and the collectors of

Q1 and Q2 are tied to VCC.

(a) If the emitter of Q2 is grounded, determine the impedance seen

at the base of Q1.

(b) If the base of Q1 is grounded, calculate the impedance seen at

the emitter of Q2.

(c) Compute the current gain of the pair, defined as (IC1 + IC2)/IB1.

Rout2 = [r2+Rout1]/(1+ 2)

In the circuit, Q2 serves as a current source for the input device

Q1. (a) Calculate the output impedance of the current source, RCS.

(b) Replace Q2 and RE with the impedance obtained in (a) and

compute the voltage gain and I/O impedances of the circuit.

Design the circuit for maximum AV but with an Rout 500.

Allowing the transistor to experience at most 400mV of base-

collector forward bias, design the stage.

RC = Rout = 500

If VBE = 0.8V, IC =

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