ECE 331 – Digital System Design

Basic Logic Functions,

Truth Tables,
and
Standard Logic Gates
Basic Logic Functions

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 Basic Logic Functions
 AND
 Logical multiplication (product)
 A . B = AB = “A and B”
 OR Order of Precedence:
1. NOT
 Logical addition (sum) 2. AND
3. OR
 A + B = “A or B” - can be modified by parenthesis
 NOT
 Logical complement
 A‘ = “not A”

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Truth Table

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 Logic Gates
x1
x2
x1 x1 x2 xn
x1 x2
x2
xn

(a) AND gates

x1
x2
x1
x2 x1 + x2 x1 + x2 + + xn

xn

(b) OR gates

x x

(c) NOT gate

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 Additional Logic Functions
 NAND
 F = (A . B)‘ = (AB)’ Not the same as F = A’ . B’

 F = not (A and B)
 Compound logic function
 NOR
 F = (A + B)’ Not the same as F = A’ + B’

 F = not (A or B)
 Compound logic function

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 Truth Tables

Exercise:

Derive the Truth Table for the NAND and NOR gates.

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 Logic Gates
x1
x2
x1
x1 x2 x1 x2 xn
x2

xn

(a) NAND gates

shorthand for a NOT gate

x1
x2
x1
x1 + x2 x1 + x2 + + xn
x2

xn

(b) NOR gates

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 Additional Logic Functions
 Exclusive-OR
 F = (A.B') + (A'.B)
 Output = 1 iff one of the inputs is 1 (but not both).
 Inclusive-OR: F = A + B
 Exclusive-NOR
 F = (A.B) + (A'.B')
 Output = 1 iff both input are 0 or both inputs are
1.
 Also known as the Equivalence function.
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 Truth Tables

Exercise:

Derive the Truth Table for the XOR and XNOR gates.

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Additional Logic Operations
A B
XOR gate

F = A xor B

F = A xnor B

XNOR gate

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 Truth Tables

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 Truth Tables
 Used to describe the functional behavior of a Boolean
expression and/or Logic circuit.
 Each row in the truth table represents a unique
combination of the input variables.
 For n input variables, there are 2n rows.
 The output of the logic function is defined for each
row.
 Each row is assigned a numerical value, with the rows
listed in ascending order.
 The order of the input variables defined in the logic
function is important.
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3-input Truth Table

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4-input Truth Table

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Standard Logic Gates

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 Standard Logic Gates
 Discrete components used to build logic circuits.
 74xx08 AND gate
 74xx32 OR gate
 74xx04 NOT gate
 74xx00 NAND gate
 74xx02 NOR gate
 74xx86 XOR gate
 Logic Families (TTL, LS-TTL, F, HC)

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Standard Logic Gates: Data sheets
 Data sheets provide essential information:
 Logic Function
 Truth Table
 Pin-out
 Electrical Characteristics
 Timing Characteristics
 Package Description(s)
 This information is necessary when building logic
circuits from discrete components.
 Each Logic Family has a unique set of characteristics.
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 Logic Families
 TTL
 Low-Power TTL (“L”)
 High-Speed TTL (“H”)
 Schottky (“S”)
 Low-Power Schottky (“LS”)
 Advanced Schottky (“AS”)
 Advanced Low-Power Schottky (“ALS”)
 Fast (“F”)
 CMOS
 High-Speed CMOS (“HC”)
 Advanced CMOS (“AC”)
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Table E.4 (p. 916 of textbook)

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Combinational Logic Circuits

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 Combinational Logic Circuits
 Composed of an interconnected set of logic gates.
 Also known as Switching Circuits
 Logic circuits can be designed from
 Truth tables
 Boolean expressions
 Logic circuits realized through
 Interconnection of discrete components
 Synthesis from a Hardware Description Language

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 Example:

Derive the Boolean expression and draw the

circuit diagram for the following truth table:

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 Example

F = x’1.x’2 + x’1.x2 + x1.x2

x1
x2

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 Example:

Derive the Boolean expression and draw the

circuit diagram for the following truth table:

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Wiring Diagrams

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Standard Logic Gate: Pin-out

(a) Dual-inline package

VDD

Gnd

(b) Structure of 7404 chip

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Standard Logic Gate: Pin-out

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Standard Logic Gate: Pin-out

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 Example:

Draw the circuit diagram and the wiring diagram

for the following Boolean expression:

F = x’2.x3 + x1.x2

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 Example
VDD

7404

7408 7432

x1
x2
x3
f

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