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External Interrupt & Keil C debug

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Polling vs
Interrupt
 How NVIC handles an interrupt

Stacking
NVIC automatically starts to the stacking
process, and pushes registers to preserve the
running environment. Status register (xPSR),
Program counter (PC), Link Register (LR),
R12, R3, R2, R1, R0
Unstacking
Automatically pops the values of
these registers out of the stack. The
NVIC recovers the processor’s
state or called running environment.
From R0  xPSR

ISR
NVIC changes the status of Interrupt from pending state to active state.
NVIC forces the processor to branch to the interrupt handler, and starts to execute the
interrupt handler. The interrupt service routine completes its execution by running the
following instruction: BX LR
 Nested in Interrupts
Preemption

Tail chaining
External interrupt
 The external interrupt controller consists of up to 19
edge detectors for generating interrupt requests

 Each input line can be independently configured and

the corresponding trigger event (rising or falling or
both).

 Each line can also masked independently.

 A pending ( thanh gi lưu trữ chờ đợi) register maintains

the status line of the interrupt requests
External interrupt controller block diagram
o GPIO pins of the same order are
grouped together and connected to an
EXTI channel
o We can also decide when to sense an
interrupt – on rising/falling or both edges
o Never use an input pin without an
internal or external pull-up or pull-down
resistor
PINOUT SELECTION
PIN CONFIGURATION

GPIO mode:
- External Interrupt Mode with Rising edge trigger detection
- External Interrupt Mode with Falling edge trigger detection
- External Interrupt Mode with Rising/Falling edge trigger detection
GPIO Pull-up/Pull-down:
- No Pull-up and No Pull-down
- Pull – up
- Pull - Down
NVIC CONFIGURATION
 Keil Debugger Tutorial
Software vs Hardware Debug
 Debug Control

You can program the STM32 flash by clicking the LOAD

button

Click the debug button to start the debug and click it again
to exit the debug.

You can use the breakpoint button to set a break point in

either disassembly or source windows.

When a program stops at a breakpoint, the corresponding instruction has not

been executed yet.
(In both windows, a yellow arrow or marker points to the next instruction to be
executed)
 Debug Control

Commonly used debug control buttons:

• Run: Continues the execution from the current position until you click
Stop or the program is paused by a breakpoint.

• Step In: Execute one step and enter the function if the current step
calls a function.

• Step Over: Execute one step and run the function all at once if the
current step calls a function.

• Step Out: Execute until the current function returns.

 Debug Control

Disassembly window

Breakpoint

Source window
Peripheral Registers
From the menu: Peripherals ⟶ System Viewer, we can view and update
the control and data registers of all available peripherals
 Watch Window

Watch Window (bottom left corner of the debug window) –

displays values of selected program variables and resources.
This enables one to monitor the key program variables to
determine the current state of the program, and whether the
program is producing expected results. One or two Watch
windows can be created during a debug session.
To add a variable, for example “i”, to window Watch 1, locate variable “i” in any statement in
the Source Window, right click on it, and select: Add ‘toggles’ to > Watch 1. The variable will
be displayed
vs. MSP430, AVR (Arduino)
When an interrupt is occurs, the Global Interrupt Enable bit is cleared
and all Interrupt are disabled  Disable Nested Interrupts.
But, the user software can write logic to GIE bit to Enable nested
Interrupt  All enable interrupts can then interrupt the current interrupt
routine (regardless(bất kể) of the interrupt priorities). (trích trong
datasheet)

There are basically two types of interrupts:

• The fist types triggered by an event that sets the Interrupt Flag.
Similary, if one or more interrupt conditions occur while the Global
Interrupt Enable bit is cleared, the crressponding Interrupt Flag(s)
will be set and remember until the Global Interrupt Enable bit is set,
and will then excuted by order of priority. (MSP430 & AVR)

• The second type of Interrupts will trigger as long as the interrupt

condition is present. These interrupt do not necessarily have
Interrupt Flags. If the interrupt condition disappears before the
interrupt is enabled, the interrupt will not be trigger.
(AVR, ?MSP430).
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ARM/STM32 Research Team

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