Chapter 13

Basic Relay Instructions

 Objectives (1 of 2)

• Describe the function of the normally open, or

examine if closed, instruction.
• Describe the function of the normally closed,
or examine if open, instruction.
• Explain the function of one-shot instruction.
 Objectives (2 of 2)

• Explain the function and programming of the

latch and unlatch instructions.
• Explain input and output instruction
formatting for the SLC 500 and MicroLogix
PLCs.
• Given an address, identify the input or output
point on an SLC 500 fixed or modular PLC
and a MicroLogix 1000 PLC.
 PLC Instructions

• Each PLC manufacturer has its own

vocabulary of instructions called the PLC
instruction set.
• Even though different PLCs have different
instruction sets, there are basic instructions
shared by all PLCs.
 Bit or Relay Instructions

• Contacts and coils are the basic symbols

found on a ladder program.
• Normally open and normally closed
instructions are programmed to represent
input conditions.
• Contacts and coils are referred to as relay
instructions.
Overview of Bit Instructions
 SLC 500 XIC Instruction

• SLC 500 normally open instruction is called

the XIC or examine if closed instruction.
• XIC instruction directs the processor to test
for an on condition from the referenced
address bit.
XIC Instruction Interaction
XIC Input Instruction
 SLC 500 XIO Instruction (1 of 3)

• SLC 500 normally closed instruction is called

the XIO or examine if open instruction.
• XIO instruction directs the processor to test
for an off condition from the referenced
address bit.
 SLC 500 XIO Instruction (2 of 3)

• The XIO instruction is normally closed,

representing a 0 in the input status table.
• Finding a 0 in the status file referencing the
instruction address means the device
controlling the bit address is in the off
condition.
 SLC 500 XIO Instruction (3 of 3)

• A normally closed instruction evaluated as

closed is a true instruction.
• Finding the normally closed instruction true,
the instruction will continue to provide
continuity through the instruction on the rung.
Instruction Controlling
an Output Instruction
Physical Input Conditions and the
Normally Closed XIO Instruction
 SLC 500 Output Instruction (1 of 2)

• It is typically represented as an output coil.

• SLC 500 refers to an output enable or OTE
instruction.
• Every rung must have an output instruction.
• Multiple outputs must be programmed in
parallel.
 SLC 500 Output Instruction (2 of 2)

• Output instruction is always the last

instruction before the right power rail.
• Output instruction represents the action to be
taken when the solved input logic results in a
logically true or false rung.
Ladder Rung Containing
XIC and OTE Instructions
 Bit Instruction Addressing

• Each instruction on a ladder rung must have

an address that associates with the field
device and data table the instruction is
examining.
– Typical XIC address is I:1/0.
– Typical OTE address is O:2/1.
 Basic SLC 500 Input
or Output Addressing Format
 I:1/0 Breakdown (1 of 2)

• I = This is an input instruction.

– Input address data stored in the input status
file
• : = element delimiter
– Separate file type and file number
• 1 = Identifies the chassis slot in which the
address’ module resides
 I:1/0 Breakdown (2 of 2)

• / = bit delimiter
– Separates the input bit slot reference from the
input bit reference
• 1 = screw terminal number of this input
reference from the input module residing in
chassis slot 1
 Slot Identification in
an SLC 500 Chassis (1 of 2)
• To accurately identify a specific input point
among multiple input modules, each slot in a
modular chassis is assigned a slot number.
• Power supply mounts on the left side of the
chassis.
• First slot next to power supply is reserved for
the processor.
 Slot Identification in
an SLC 500 Chassis (2 of 2)
• Processor always goes in the first slot, which
is identified as slot 0.
• Slots are numbered in decimal numbers from
left to right: slot 0, 1, 2, 3, 4, 5, 6.
• Four chassis are available.
– 4-, 7-, 10-, and 13-slot chassis
– Total 3 chassis 30 local I/O slots per PLC
 Seven-Slot SLC 500
Chassis Slot Identification
 The One-Shot Rising Instruction

• One-shot rising instruction (OSR) is an input

instruction that allows an event to occur only
once.
• OSR instruction fires on the rising edge (off-
to-on transition) of the input pulse.
• It will not fire again until input transitions to off
and then on.
 SLC 500 Family
One-Shot Rising Ladder Rung
 Leading-Edge Versus Trailing-
Edge One-Shot Timing Diagram
Internal Bit Controlling
a One-Shot Instruction
 Output Latch and
Unlatch Instruction (1 of 2)
• An output latch (OTL) instruction is an output
instruction used to maintain, or latch, an
output on even if the status of the input logic
changes.
• The output unlatch (OUT) instruction is used
to unlatch the latched output.
 Output Latch and
Unlatch Instruction (2 of 2)
• OTL and OTU instructions are typically used
in pairs.
• OTU is used by itself to unlatch status bits
set by the processor.
• OTL and OUT are retentive instructions.
 Retentive Instructions (1 of 2)
• Two types of instructions
– Nonretentive
– Retentive
• Non-retentive instructions do not retain their
logical state through a rung true-to-false
transition or power interruption.
• Retentive instruction retains its logical state
through a rung transition or a power flow
interruption.
 Retentive Instructions (2 of 2)

• Retentive must have battery backup to retain

state through power interruption.
• OTE instruction is non-retentive.
• OTL and OUT instructions are retentive.
 Latching and
Unlatching Ladder Logic
Latching Instruction Programmed
Before the Unlatch Instruction
Internal Bit B3:0/0
Used as an Output
 Each Bit File Element
Consists of One 16-bit Word
 Bit File Addressing (1 of 2)

• B = a bit instruction
– Bit file address data is stored in the binary or
bit file, B3.
• 3 = identifies this as file 3
• : = element delimiter
– Separate file type and file number
• 1 = identifies the element number
 Bit File Addressing (2 of 2)

• / = bit delimiter
– Separates the file designator from the bit
number
• 1 = bit number of this reference from bit file
element 1
 User-Defined Bit Files

• If your processor supports expanding data

files and has enough memory, any data file
over file 8 up to 255 can be created as a
user-defined bit file.
• Each user-defined file can have up to 256
elements.
– Sample addresses: B10:4/8 or B65:29/12