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Rumani M /
rumanimangkudjaja1@gmail.com
Selasa, 03 Desember 2019 School of Electrical Engineering 0
Von Neumann Architecture
◦ The 5 component design model
The Instruction Cycle
◦ Basic
◦ Exceptions
Instruction Architecture
◦ Software design
◦ Hardware circuits
R. Rumani M /
rumanimangkudjaja1@gmail.com
School of Electrical Engineering Selasa, 03 Desember 2019 1
Von Neumann Architecture
◦ 5 component design of the stored program digital computer
◦ The instruction cycle
Basic
Exceptions
◦ Instruction architecture
Software design
Hardware circuits
R. Rumani M /
rumanimangkudjaja1@gmail.com
School of Electrical Engineering Selasa, 03 Desember 2019 2
Principles
◦ Data and instructions are both stored in the main
memory(stored program concept)
◦ The content of the memory is addressable by location
(without regard to what is stored in that location)
◦ Instructions are executed sequentially unless the order is
explicitly modified
◦ The basic architecture of the computer consists of:
Computer
Data
CPU Main
Bus Memory
Control
Input
Data Device
CPU Main
Bus Memory Bus
Control Output
Device
Five Main Components: Bus
1. CPU
2. Main Memory (RAM)
Secondary
Storage
3. I/O Devices
Device
4. Mass Storage
5. Interconnection network (Bus)
Selasa, 03 Desember 2019 4
R. Rumani M /
rumanimangkudjaja1@gmail.com
School of Electrical Engineering Selasa, 03 Desember 2019 5
The Instruction Cycle
◦ Basic
◦ Intermediate
◦ Exceptions
R. Rumani M /
rumanimangkudjaja1@gmail.com
School of Electrical Engineering Selasa, 03 Desember 2019 6
Once the computer has been
started (bootstrapped) it Start
continually executes
instructions (until the
computer is stopped)
Fetch
Different instructions take Instruction
different amounts of time to
execute (typically)
All instructions and data are
contained in main memory Execute
Instruction
R. Rumani M /
rumanimangkudjaja1@gmail.com
School of Electrical Engineering Selasa, 03 Desember 2019 7
Start
A complete instruction consists
of
◦ operation code Fetch
Instruction
◦ addressing mode
◦ zero or more operands
immediately available data Decode
(embedded within the Instruction
instruction)
the address where the data
Fetch
can be found in main memory
Operand
Execute
Instruction
R. Rumani M /
rumanimangkudjaja1@gmail.com 8
School of Electrical Engineering Selasa, 03 Desember 2019
Start
Exceptions, or errors, may occur
at various points in the Possible
instruction cycle, for example:
Exception Fetch
? Instruction
Possible
Exception Decode
? Instruction
Possible
Exception Fetch
? Operand
Possible
Execute
Exception?
Instruction
R. Rumani M /
rumanimangkudjaja1@gmail.com 9
School of Electrical Engineering Selasa, 03 Desember 2019
Start
Exceptions, or errors, may occur
at various points in the
instruction cycle, for example: Fetch
Instruction
Fetch
Operand
Execute
Instruction
R. Rumani M /
rumanimangkudjaja1@gmail.com 10
School of Electrical Engineering Selasa, 03 Desember 2019
Start
Exceptions, or errors, may occur
at various points in the
instruction cycle, for example: Fetch
Instruction
Fetch
Operand
Execute
Instruction
R. Rumani M /
rumanimangkudjaja1@gmail.com 11
School of Electrical Engineering Selasa, 03 Desember 2019
Start
R. Rumani M /
rumanimangkudjaja1@gmail.com 12
School of Electrical Engineering Selasa, 03 Desember 2019
Software design
Hardware circuits
R. Rumani M /
rumanimangkudjaja1@gmail.com
School of Electrical Engineering Selasa, 03 Desember 2019 13
Each computer CPU must be designed to accommodate and
understand instructions according to specific formats.
Examples:
◦ All instructions must have an operation code specified
◦ NOP no operation
◦ TSTST test and set
Op Code
R. Rumani M /
rumanimangkudjaja1@gmail.com
School of Electrical Engineering Selasa, 03 Desember 2019 14
Each computer CPU must be designed to accommodate and
understand instructions according to specific formats.
Examples:
◦ Most instructions will require one, or more, operands
◦ These may be (immediate) data to be used directly
◦ or, addresses of memory locations where data will be found
(including the address of yet another location)
R. Rumani M /
rumanimangkudjaja1@gmail.com
School of Electrical Engineering Selasa, 03 Desember 2019 15
Sometimes the instruction format requires a code, called the Mode,
that specifies a particular addressing format to be distinguished from
other possible formats
◦ direct addressing
◦ indirect addressing
◦ indexed addressing
◦ relative addressing
◦ doubly indirect addressing
◦ etc.
R. Rumani M /
rumanimangkudjaja1@gmail.com
School of Electrical Engineering Selasa, 03 Desember 2019 16
The CPU must be designed to accommodate the
instructions and data to be processed
System Bus
CPU RAM
System Bus
ALU
Address Bus
Regs
Control Bus
Data Bus
PC
CU
IR
Internal
CPU Bus
17
Everything that the computer can do is the result of
designing and building devices to carry out each
function
R. Rumani M /
rumanimangkudjaja1@gmail.com
School of Electrical Engineering Selasa, 03 Desember 2019 20
All instructions together are called the instruction set
◦ CISC complex instruction set computer
◦ RISC reduced instruction set computer
R. Rumani M /
rumanimangkudjaja1@gmail.com
School of Electrical Engineering Selasa, 03 Desember 2019 21
R. Rumani M /
rumanimangkudjaja1@gmail.com
School of Electrical Engineering Selasa, 03 Desember 2019 22