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Hardware Modeling

Modeling of Transistor

Hardware Modeling S.M.Lambor 1


Diode Model of the npn BJT
• The diode is controlled by the
voltage at B.

• When the diode is completely


on, the switch is closed. This is
the saturation region.

• When the diode is completely


off, the switch is open. This is
the cutoff region.

• When the diode is in between,


it is in the active region.

Hardware Modeling S.M.Lambor 3


Schematic Symbols and Sign Conventions

C C
– –
VBC IC VBC IC
+ + + +
B B
VCE VCE
IB + IB +
– –
VBE VBE
– –
IE IE
E E

(a) npn (b) pnp

Hardware Modeling S.M.Lambor 7


Operations Modes

Hardware Modeling S.M.Lambor 8


Forward Active Operation
Depletion
Carrier Concentration Regions

E B C
nb(0)

pc0
nb0
pe0
x
0 W

WB Hardware Modeling S.M.Lambor 9


Saturation Mode
Carrier Concentration

E nb (0) B C

QA nb(W)

QS pc0
pe0
nb0
x
0 W

WB Hardware Modeling S.M.Lambor 11


Cutoff
Carrier Concentration

E B C

pc0
nb (0) nb0 nb (W)
pe0
x
0 W

WB Hardware Modeling S.M.Lambor 12


A Model for Manual Analysis
IB IB
B C B C
+
VBE  F IB VBE(on) +  F IB


IB = IS (eV BE/T – 1)
E E

(a) Forward-active (b) Forward-active (simplified)

IB
B C

VBE(sat) + + VCE(sat)
– –

IC <  F IB
E
(c) Forward-saturation

Hardware Modeling S.M.Lambor 13


Capacitive Model for Bipolar Transistor
C

QR Cbc
Ccs
collector-substrate
B junction capacitance

S
QF Cbe

base charge E
base-emitter
junction capacitances
base-collector
Hardware Modeling S.M.Lambor 14
Bipolar Transistors - Secondary Effects

• Early Voltage
• Parasitic Resistances
• Beta Variations

Hardware Modeling S.M.Lambor 16


Early Voltage

IC
Forward
Active VBE3

Saturation
VBE2

VBE1

VCE
VA

Hardware Modeling S.M.Lambor 17


Modeling of Amplifier

Hardware Modeling S.M.Lambor 18


 The BJT is an an excellent amplifier when biased
in the forward-active region.
 The FET can be used as an amplifier if operated
in the saturation region.
 In these regions, the transistors can provide high
voltage, current and power gains.
 DC bias is provided to stabilize the operating
point in the desired operation region.
 The DC Q-point also determines
◦ The small-signal parameters of the transistor
◦ The voltage gain, input resistance, and output resistance
◦ The maximum input and output signal amplitudes
◦ The overall power consumption of the amplifier

Hardware Modeling S.M.Lambor 19


A Simple BJT Amplifier

The BJT is biased in the forward active region by dc voltage sources VBE
and VCC = 10 V. The DC Q-point is set at, (VCE, IC) = (5 V, 1.5 mA) with IB
= 15 mA.
Total base-emitter voltage is: vBE VBE  vbe

Collector-emitter voltage is: v 10  i R This produces a load line.


CE C C
Hardware Modeling S.M.Lambor 20
BJT Amplifier (continued)
If changes in operating currents
and voltages are small enough,
then IC and VCE waveforms are
undistorted replicas of the input
signal.
A small voltage change at the
base causes a large voltage
change at the collector. The
voltage gain is given by:
˜ v˜ce 1.65180
Av    206180 206
v˜ 0.0080
be
The minus sign indicates a 1800
 phase shift between input and
output signals.
An 8 mV peak change in vBE gives a 5 mA change in iB and a 0.5
mA change in iC.
21
The 0.5 mA change in i gives a 1.65 V change in v .
A Practical BJT Amplifier using
Coupling and Bypass Capacitors
DC and AC Analysis -- Application of
Superposition
 DC analysis:
◦ Find the DC equivalent circuit by replacing all capacitors
by open circuits and inductors (if any) by short circuits.
◦ Find the DC Q-point from the equivalent circuit by using
the appropriate large-signal transistor model.
 AC analysis:
◦ Find the AC equivalent circuit by replacing all capacitors
by short circuits, inductors (if any) by open circuits, dc
voltage sources by ground connections and dc current
sources by open circuits.
◦ Replace the transistor by its small-signal model
◦ Use this equivalent circuit to analyze the AC
characteristics of the amplifier.
◦ Combine the results of dc and ac analysis (superposition)
to yield the total voltages and currents in the circuit.
Hardware Modeling S.M.Lambor 25
Summary of useful equations
• Basic DC I E  I B  IC
operating I C  I B
conditions:
I E  I C
 1


I C  I S eVBE / VT
VC  VCC  I C RC

• Add a small signal:

IC vbe 
ic  vbe  g m vbe r  
VT ib gm
IC vbe  1
gm  re   
VT ie gm gm
Hardware Modeling S.M.Lambor 26
How to build a Common emitter
amplifier

• Why bother with 2 voltage


supplies?
• Use a voltage divider R2/R1
to provide base-emitter
voltage to correctly bias the
transistor.

Hardware Modeling S.M.Lambor 29


DC condition: the voltage divider
VBE  VB  VE  0.6V
• The voltage divider
VB  I E RE  0.6V
should provide
sufficient voltage to R1
now VB  VBB
place the transistor in R1  R2
active mode (base- R1 I R  0.6V
so  E E
emitter forward biased): R1  R2 VBB

• Current through
resistors should be >10
Vbb I
 10 C
times base current for R1  R2 
stability

Hardware Modeling S.M.Lambor 30


Amplifier specifications

 What other parameters of an amplifier do we


care about?
◦ Voltage gain
◦ Dynamic range
◦ Frequency response (bandwidth)
◦ Input impedance
◦ Output impedance

Hardware Modeling S.M.Lambor 31


Voltage Gain
• Voltage gain
• Use small signal model (short Voltage sources and capacitors)
ground vb  ie (re  RE )
vc  ic RC  ie RC since   1

vout vc RC
αie voltage gain  
vin vb re  RE

vc RC
usually re<<RE 
vb RE

• Voltage gain is defined by resistors RC and RE


ground

Hardware Modeling S.M.Lambor 32


Frequency response (Bandwidth)
• Normally interested in providing
a small, AC signal to the base
• Use capacitors to remove
("block") any low frequency (DC)
component ("capacitively couple
the signal to the base") which
could affect the bias condition
• C1 forms a high-pass filter with
R1in parallel with R2 (Assuming
the AC impedance into the base
is large).
• Cut off frequency ω0=1/RC, so
1
to remove frequencies <fmin: C1 
 R1 R2 
2f min  
 R1  R2 
Hardware Modeling S.M.Lambor 33
Frequency response (Bandwidth)
• Also worthwhile to place a
capacitor on the output
• C2 forms a high pass filter with RL.
• Cut off frequency ω0=1/RC, so to
remove frequencies <fmin:

1
C2 
2f min RL

Hardware Modeling S.M.Lambor 34


Dynamic Range
• Maximum voltage output = Vbb
• Minimum = 0
• Beyond this the signal becomes 'clipped' or distorted
• To get the maximum possible voltage swing, both positive and
negative, set VC=0.5 VBB
• Maximum 'dynamic range‘- The maximum undistorted voltage
swing.

VC

Hardware Modeling S.M.Lambor 35


Input impedance
• Consider the circuit without the voltage
divider resistors. What's the small signal (AC)
input impedance at the base, rb?
v
rb  b
ib
v b  (re  Re )ie
ie rOUT
ib 
 1
v
rb  b  (  1)(re  Re )
ib
  1  ; re  Re
rb  Re rb
• Including voltage divider resistors in parallel
• Input signal sees a total
 impedance rIN= R1 // R2 // rb
input
36
Output impedance

vo io RC
rOUT    RC
io io ROUT

rb

Hardware Modeling S.M.Lambor 37


• If RL=10kΩ and we want a low frequency cutoff of 20Hz, What is C2?
• If VBB=15V and IC=2mA what is RC?

DC condition

R1 I E RE  0.6V

R1  R2 VBB

Vbb IC
 10
R1  R2 
Frequency response
Impedance
1
C1 
 R1 R2 
rb  Re Gain/Dynamic range
2f min  
 R1  R2  rIN  R1 || rb || R2 VC  0.5VBB
1 vo io RC
C2  rOUT    RC vc RC
2f min RL io io 
vb RE
 Hardware Modeling S.M.Lambor 38
Impedances
• Why do we care about the input and output impedance?
• Simplest "black box" amplifier model:

ROUT

VIN RIN AVIN VOUT

• The amplifier measures voltage across RIN, then generates a


voltage which is larger by a factor A
• This voltage generator, in series with the output resistance
ROUT, is connected to the output port.
• A should be a constant (i.e. gain is linear)

Hardware Modeling S.M.Lambor 39


Impedances
• Attach an input - a source voltage VS plus source impedance RS

RS ROUT

VIN RIN AVIN VOUT


VS

• Note the voltage divider RS + RIN.


• VIN=VS(RIN/(RIN+RS)
• We want VIN = VS regardless of source impedance
• So want RIN to be large.
• The ideal amplifier has an infinite input impedance

Hardware Modeling S.M.Lambor 40


Impedances
• Attach a load - an output circuit with a resistance RL

RS ROUT

RIN AVIN RL
VS VIN VOUT

• Note the voltage divider ROUT + RL.


• VOUT=AVIN(RL/(RL+ROUT)
• Want VOUT=AVIN regardless of load
• We want ROUT to be small.
• The ideal amplifier has zero output impedance

Hardware Modeling S.M.Lambor 41


Questions

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? ? ? ?
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Hardware Modeling S.M.Lambor 44

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