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Modeling of Transistor
C C
– –
VBC IC VBC IC
+ + + +
B B
VCE VCE
IB + IB +
– –
VBE VBE
– –
IE IE
E E
E B C
nb(0)
pc0
nb0
pe0
x
0 W
E nb (0) B C
QA nb(W)
QS pc0
pe0
nb0
x
0 W
E B C
pc0
nb (0) nb0 nb (W)
pe0
x
0 W
IB
B C
VBE(sat) + + VCE(sat)
– –
IC < F IB
E
(c) Forward-saturation
QR Cbc
Ccs
collector-substrate
B junction capacitance
S
QF Cbe
base charge E
base-emitter
junction capacitances
base-collector
Hardware Modeling S.M.Lambor 14
Bipolar Transistors - Secondary Effects
• Early Voltage
• Parasitic Resistances
• Beta Variations
IC
Forward
Active VBE3
Saturation
VBE2
VBE1
VCE
VA
The BJT is biased in the forward active region by dc voltage sources VBE
and VCC = 10 V. The DC Q-point is set at, (VCE, IC) = (5 V, 1.5 mA) with IB
= 15 mA.
Total base-emitter voltage is: vBE VBE vbe
IC vbe
ic vbe g m vbe r
VT ib gm
IC vbe 1
gm re
VT ie gm gm
Hardware Modeling S.M.Lambor 26
How to build a Common emitter
amplifier
• Current through
resistors should be >10
Vbb I
10 C
times base current for R1 R2
stability
vout vc RC
αie voltage gain
vin vb re RE
vc RC
usually re<<RE
vb RE
1
C2
2f min RL
VC
vo io RC
rOUT RC
io io ROUT
rb
DC condition
R1 I E RE 0.6V
R1 R2 VBB
Vbb IC
10
R1 R2
Frequency response
Impedance
1
C1
R1 R2
rb Re Gain/Dynamic range
2f min
R1 R2 rIN R1 || rb || R2 VC 0.5VBB
1 vo io RC
C2 rOUT RC vc RC
2f min RL io io
vb RE
Hardware Modeling S.M.Lambor 38
Impedances
• Why do we care about the input and output impedance?
• Simplest "black box" amplifier model:
ROUT
RS ROUT
RS ROUT
RIN AVIN RL
VS VIN VOUT
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