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SDH - Basics
Presented By : Narender Arora
Page 3
Content
4. Basic elements of STM-1
4.1 Digital signal sections
4.2 The Section Overhead (SOH)
4.3 The Path Overhead (POH)
4.4 Pointer activities
4.5 Mapping procedures
9. Let’s summarize
Page 5
Current Transmission
Technologies
Page 6
The Telephone System
Page 7
Sampling
Audio Signal
T1 T2 T3
time
T4 T5 T6 T7
Sampler Output
Pulse Amplitude T1 T2 T3
time
Modulated T4 T5 T6 T7
(PAM) signal
Page 8
Non-Linear Quantization and
Quantization
Encoding
Level digital codes
112 1 1 1 1 X X X X
96 1 1 1 0 X X X X 1/2V
80 1 1 0 1 X X X X
1/4V
1/8V
64 1 1 0 0 X X X X
1/16V
48 1 0 1 1 X X X X
1/32V
32 1 0 1 0 X X X X
1 0 0 1 X X X X 1/64
1 0 0 0 X X X X
V
-V 0 0 0 0 X X X X
In accordance with 0 0 0 1 X X X X
CCITT’s A-law 0 0 1 0 X X X X
Page 9
PCM Signal Data Rate
8000 8
samples x bits per = 64kbit/s
per sec sample
Page 10
Time Division Multiplexing (TDM)
Page 11
PDH Systems Worldwide
Japan USA Europe
5. 397200
397200kbit/s
kbit/s 564992
564992kbit/s
kbit/s
x4 x4
4. 97728
97728kbit/s
kbit/s 274176
274176kbit/s
kbit/s 139264
139264kbit/s
kbit/s
x3
x3 x6 x4
3. 32064
32064kbit/s 44736
kbit/s 44736kbit/s
kbit/s 34368
34368kbit/s
kbit/s
x4
x5 x7
6312 8448
8448kbit/s
6312kbit/s
kbit/s kbit/s
2. order
x4 x3 x4
1544
1544kbit/s
kbit/s 2048
2048kbit/s
kbit/s
primary rate
x 24 x 30/31
64
64kbit/s
kbit/s
Page 12
PDH Multiplex / Demultiplex
1
64 kbit/s 8448 kbit/s (+/-30ppm)
Data Signals 30 1
34 368 kbit/s (+/-20ppm)
DSMX 1
64k/2
1
139264 kbit/s (+/-15ppm)
0.3 to 3.1 kHz 1
30
AF signals
PCMX 30
1
15 kHz
Sound Program 5
DSMX
4
Signals 34/140
PCMX 30 4
DSMX
8/34
DSMX Channel Capacity:
64
30
2/8 64 x 30 = 1920
Page 13
2 Mbit/s Frame Structures
2.048 kbit/s frame: 32x8 bit = 256 bit in 125µs
signalling signalling
information information
Page 14
2 Mbit/s Frame Structures
2.048 kbit/s frame: 32x8 bit = 256 bit in 125µs
signalling signalling
information information
Si 0 0 1 1 0 1 1 FAS
(frames 0,2,4...)
Si 1 A Sa Sa Sa Sa Sa NFAS
(M) 4 5 6 7 8 (frames 1,3,5...)
Page 15
2 Mbit/s Frame Structures
2.048 kbit/s frame: 32x8 bit = 256 bit in 125µs
signalling signalling
information information
0 0 0 0 x Y x x frame 0
Si 0 0 1 1 0 1 1 FAS
MFAS NMFAS
(frames 0,2,4...)
a b c d a b c d
Si 1 A Sa Sa Sa Sa Sa NFAS signalling signalling
(M) 4 5 6 7 8 (frames 1,3,5...) subscr. n subscr. n+15
Page 16
2 Mbit/s Frame Structures
2.048 kbit/s Multiframe, ITU-T G.704
multiframe
fr 15 fr 0 fr 1 fr 2 fr 3 fr 4 fr 5 fr 6 fr 7 fr 8 fr 9 fr 10 fr 11 fr 12 fr 13 fr 14 fr 15
sub multiframe 1 sub multiframe 2
2.048 kbit/s frame: 32x8 bit = 256 bit in 125µs
encoded voice / data signals encoded voice / data signals
time
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 slots
0 0 0 0 x Y x x frame 0
Si 0 0 1 1 0 1 1 FAS
MFAS NMFAS
(frames 0,2,4...)
a b c d a b c d
Si 1 A Sa Sa Sa Sa Sa NFAS signalling signalling
(M) 4 5 6 7 8 (frames 1,3,5...) subscr. n subscr. n+15
Page 17
Plesiochronous Hierarchies -
Frame Structures
8.448 kbit/s; frame length 848 bit; 100.4 us; ITU-T G.742
10 2 200 4 208 4 208 4 4 204
1a 2a 3a 4a 1b 2b 3b 4b 1c 2c 3c 4c s1 s2 s3 s4
A : Alarm Bit
1 1 1 1 0 1 0 0 0 0 A N N : National Spare Bit
1a,b,c : Stuffing Control Bit
S : Stuffing Bit
34.368 kbit/s; frame length 1536 bit; 44.7 us; ITU-T G.751
10 2 372 4 380 4 380 4 4 376
1a 2a 3a 4a 1b 2b 3b 4b 1c 2c 3c 4c s1 s2 s3 s4
1 1 1 1 0 1 0 0 0 0 A N
Page 18
Plesiochronous Hierarchies -
Frame Structures
1a 2a 3a 4a 1b 2b 3b 4b 1c 2c 3c 4c 1d 2d 3d 4d 1e 2e 3e 4e s1 s2 s3 s4
A : Alarm Bit
1 1 1 1 1 0 1 0 0 0 0 0 A NN N
N : National Spare Bit
1a,b,c,d : Stuffing Control Bit
S : Stuffing Bit
Page 19
PDH Maintenance Signals
LOS
LOF PDH AIS
AIS Equipment
D-Bit
BER 10-3
BER 10-6 PDH AIS
Equipment
D-Bit
N-Bit
Page 20
Plesiochronous Drop & Insert
main
OLTU OLTU OLTU OLTU
stand-by
34 - 140 34 - 140 34 - 140 34 - 140
8 - 34 8 - 34 8 - 34 8 - 34
Page 21
The Synchronous Digital
Hierarchy (SDH)
Page 22
Why SDH ?
Simpler multiplexing
(low SDH level can be directly identified from higher
SDH level)
ADM
STM-1, STM-4
STM-4/-16/ 140Mbit/s
2Mbit/s ADM ADM
ATM -64 34Mbit/s
34Mbit/s 8Mbit/s
Switch STM-1
2Mbit/s
DXC
LAN
DSC
ADM : Add Drop Multiplexer 2Mbit/s STM-1 / STS-3c Gateway to SONET
DXC : Digital Cross Connect 34Mbit/s
TM : Terminal Multiplexer 140Mbit/s
DSC: Digital Switching Center STM-1
LAN: Local Area Network STM-4
Page 24
Layered Model of the SDH Network
Cicuit Layer
......
Packet Network Telephone Network
Lower
Order
Higher
VC-3 VC-4 Order
Path
Layer
Transmission
Media Layer
Multiplex section layer Section
Layer
Regenerator section layer
Page 25
Path Denominations
Multiplex
Section
Regenerator
Sections
VC-12 VC-3 VC-4 VC-4 VC-3 VC-12
SMX
SMX
Reg
VC-2 VC-4 VC-4 VC-2
VC-1 VC-3 VC-3 VC-1
STM-n STM-n
RSOH RSOH
STM-n MSOH
VC-4/3 POH
VC-1/2/3 POH
Page 26
Network Node Interface (NNI)
DEMUX
DEMUX
PDH PDH
MUX /
MUX /
Reg.
Page 27
Bit Rates, Frame
Structure and Interfaces
in SDH
Page 28
SDH and SONET are International
Standards
ATM: 149.760 kbit/s
STM-N AU-4 VC-4
AUG C-4 E4: 139.264 kbit/s
STS-3C STS-3C
STS-3N
SPE
x3
x1 TU-3 VC-3 ATM: 48,384
TUG-3
x3 kbit/s
x1 x7
STM-0 AU-3 VC-3 DS3: 44.736 kbit/s
STS-1 C-3
STS-1 STS-1 SPE E3 : 34.368 kbit/s
x7
TUG-2 x1 TU-2 VC-2
VT C-2 DS2: 6.312 kbit/s
group VT-6 VT-SPE
Pointer processing
TU-12 VC-12
Multiplexing x3
VT-2 VT-SPE
C-12 E1: 2.048 kbit/s
x4
Aligning
TU-11 VC-11
Mapping C-11 DS1: 1.544 kbit/s
VT-1.5 VT-SPE
Page 29
STM-1 Frame Structure
270 Columns (Bytes)
270
transmit
1 9 row by row
1
RSOH
3
4 AU Pointer Payload
5 (transport capacity)
MSOH
9
Page 30
STM-1 Frame Structure
1 RSOH
AU-4
3
4 AU Pointer
5 VC-4
MSOH
VC-4 POH
C-4
9
Page 31
Higher SDH Bitrates
STM-1 #1 11111
44444
STM-1 #4
B1 B1
B2 B2
SOH termination New SOH
The STM-4/16/64 bit rate is obtained as integer multiples of the STM-1 tributary
bit rate.
Clock offset at the tributary side is taken into consideration by pointer adaptation
on the STM-n output signal.
Page 32
STM-4 Frame Structure
36 bytes Payload
A1 A1 A1 A1 A1 A1 A1 A1 A1 A1 A1 A1 A2 A2 A2 A2 A2 A2 A2 A2 A2 A2 A2 A2 J0 Z0 Z0 Z0 X X X X X X X X
B1 E1 F1 X X X X X X X X X X X X
D1 D2 D3 X
A U Pointers
B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 K1 K2
D4 D5 D5
D7 D8 D9
D D D
10 11 12
S1 M1 E2 X X X X X X X X X X X X
#1 #2 #3 #4 #1 #2 #3 #4 #1 #2 #3 #4 #1 #2 #3 #4 #1 #2 #3 #4 #1 #2 #3 #4 #1 #2 #3 #4 #1 #2 #3 #4 #1 #2 #3 #4
Page 33
Basic Elements of STM-1
Page 34
Synchronous Network
Path
Multiplex Section Multiplex Section
Reg. Section Regenerator Section Regenerator Section
DEMUX
PDH
DEMUX
MUX /
MUX /
Reg.
back-up line
clock clock
clock
Parity Bytes B2 B2
B1 B1 B1
B3
Comm.
Channels E2, D4 ... D12 E1, F1, D1 ... D3
Page 35
Embedded Overhead Bytes
STM-1 SOH
A1 A1 A1 A2 A2 A2 J0 X X
B1 E1 F1 X X VC-3/4 POH
D1 D2 D3 J1
AU - PTR H1 Y Y H2 1 1 H3 H3 H3 B3
B2 B2 B2 K1 K2
C2
D4 D5 D6
G1
D7 D8 D9 VC-11/12/ 2 POH
F2
D10 D11 D12
H4 V5
F3 J2
S1 M 1 E2 X X K3 N2
N1 K4
P O H
MSOH Payload
Parity check
(B1 calculated by regenerator and multiplexers)
Page 37
Functions of Multiplexer Section
Overhead
A1 A1 A1 A2 A2 A2 J0
B1 E1 F1
D1 D2 D3 Parity check (B2)
AU - Pointer
B2 B2 B2 K1 K2 Alarm information (K2)
D4 D5 D6
D7
D10
D8
D11
D9
D12
Remote error indication (M1,K2)
S1 M1 E2
Page 39
Functions and Characteristics of
the Individual Elements of NNI
• The Container (C)
• Basic packaging unit for tributary signals (PDH)
• Synchronous to the STM-1
• Bitrate adaptation is done via a positive stuffing
procedure
• Adaptation of synchronous tributaries by fixed stuffing bits
• Bit by bit stuffing
Page 40
Functions and Characteristics of the
Individual Elements of the NNI
• The Tributary Unit (TU)
• Is formed via adding a pointer to the VC
Container
Container C4
Path Overhead
Virtual
Virtual Container
Container VC-4
Pointer
Administrative
Administrative Unit
Unit AU-4
Section Overhead
Synchronous
Synchronous Transport
Transport Module
Module STM-1
Page 43
Pointers
The pointer technology provides a means to accommodate
timing differences at SDH networks.
The pointer indicates the start of the payload within a STM-
1frame.
STM-1
AU-Pointer
TU- VC-4
PTR
VC-12
POH
Page 44
Use of the AU-4 Pointer Area, Coding
H1 Y Y H2 1 1 H3 H3 H3
J1
C4 payload
N N N N S S I D I D I D I D I D
Page 45
Negative Justification
RSOH
H1 H2 H3 Start of VC-4
Actual pointer
MSOH
125µs
RSOH
Pointer with
H1 H2 H3
inverted D bits
MSOH
250µs
RSOH
H1 H2 negative justification byte (data)
MSOH
375µs
New pointer RSOH
H1 H2 H3
MSOH
500µs
Page 46
Pointer justification
frame n-1
frame n AU-Pointer
frame n+1
AU-Pointer
Page 47
Mappings
Page 48
Mapping 140 Mbit/s
9 261
RSOH
AU Pointer 260
J1
B3
MSOH C2
G1 20 x 13 bytes per row
F2
H4 C-4
Z3 140 Mbit/s
K3
Z5
Page 49
Mapping of a 140 Mbit/s Tributary
into VC-4
The figure shows one row of the VC-4
J1 W 96 I X 96 I Y 96 I Y 96 I Y 96 I
X 96 I Y 96 I Y 96 I Y 96 I X 96 I
Y 96 I Y 96 I Y 96 I X 96 I Y 96 I
Y 96 I Y 96 I X 96 I Y 96 I Z 96 I
Page 50
Mapping 34 Mbit/s
Container C-4 contains 3 times a 34 Mbit/s PDH Tributary
(ETSI structure)
9 261
RSOH
AU Pointer 260
J1
H1 H1 H1
B3
MSOH C2
H2 H2 H2
J1 VC-3 #3
G1 H3 H3 H3 B3 J1 VC-3 #2
F2 C2 B3 J1 VC-3 #1
H4 G1 C2 B3
Z3 fixed stuffing F2 G1 C2
K3 H4 F2 G1
Z5 Z3 H4 F2
C3
VC-4 POH
K3 Z3 H4 C-3
Z5 K3 Z3 34 Mbit/s
Z5 K3
Z5
VC-3 POH
84
C-3 transport capacity: 84 X 9 x 64 kbit/s = 48.384 kBit/s
Page 51
Mappings 2 Mbit/s
RSOH
AU pointer
MSOH VC-4
TUG-3
TUG-2
TU-12
Tu pointer
VC-12
Page 52
Mapping and Multiplexing (1)
1 2 3 4 5 6 7 8 9 10...........................................261
RSOH J1
B3
S T U F F I N G
S T U F F I N G
C2
AU-4 Pointer
G1
F2
H4
MSOH Z3
K3
Z5 A B C A B C A A B C
Page 53
Mapping and Multiplexing (2)
1 2 3 4 5 6 7 8 9 10...........................................86
TUG-3 N
NPI: Null Pointer
S T U F F I N G
P
I Indication
1001 XX11 1110 0000
S T U F F I N G
XXXX XXXX
A1 B1 C1 D1 E1 F1 G1 A2 E3 F3 G3
TU-12s occupy
TU-12 ..... TU-12 TU-12 ..... TU-12 TU-12 ..... TU-12 36 bytes per
#1 #3 #1 #3 #1 #3 frame
Page 54
Mapping 2 Mbit/s (asynchronous)
VC-12 Structure: VC-4 POH
V5 V4
R 35 bytes
in one XXX XX00 H4 Payload
32 bytes (32x8I) VC-4 VC-4 Payload
R V1
J2
C1 C2 O O O O R R XXX XX01 H4 Payload
32 bytes (32x8I) VC-4 Payload
R V2
140 Bytes
N2
C1 C2 O O O O R R XXX XX10 H4 Payload
32 bytes (32x8I) VC-4 Payload
R V3
K4
S2 I I I I I I I XXX XX11 H4 Payload
32 bytes (32x8I) VC-4 Payload
V4
R V5: VC-12 Path Overhead
R: fixed stuffing bits XXX XX00 H4 Payload
500 µs J2: Path Trace
C1/2: Justification control bit VC-4 Payload
O: Overhead bit
N2: Network Operator byte
K4: APS
H4: Indicates the number of Vx
S2: Justification opportunity bit Page 55
V1,V2,V3: TU-12 Pointer
I: Info-bit
VC-4 Contiguous Concatenation
4 x 9 bytes 4 x 261 bytes
STM-4
RSOH
AU-4 Pointers
J1
B
MSOH 3C
Fixed Stuff
Fixed Stuff
Fixed Stuff
2
G
1
F2 C-4-4c
H4
F3
K
3
N
1
VC-4-4c
4 x 261 bytes
The first Pointer indicates J1
All other Pointers are set to "Concatenation Indication"
ATM Cell
Page 56
How to transport 600 Mbit/s ATM
via 150 Mbit/s SDH ?
?
VC4
4x VC4
VC4 150 Mbit/s
Out In Out In
In Out In Out
Page 57
VC-4 virtual Concatenation
(Generation)
4 x 9 bytes 4 x 261 bytes
STM-4
RSOH
AU-4 Pointers
J1 J1 J1 J1
B3 B3 B3 B3
MSOH C2 C2 C2 C2
G1 G1 G1 G1
F2 F2 F2 F2 C-4-4vc
H4 H4 H4 H4
F3 F3 F3 F3
K3 K3 K3 K3
N1 N1 N1 N1
VC-4-4vc
Generation: 4 x 261 bytes
All Pointers are set to the same value
All VC-4 should be kept in the same STM-4 ATM Cell
All VC-4 are transported as individual VC-4's
Page 58
VC-4 virtual Concatenation
(Termination)
J1 J1
J1
B3 B3
B3 J1
VC-4
C2 #1 B3 C2 C2 VC-4 #4
G1 C2 VC-4 #2 G1 VC-4 #3 G1
F2 F2
F2 G1
H4 H4
H4 F2
F3 F3
F3 H4
K3 K3
K3 F3 J1 J1 J1 J1
N1 N1
N1 K3 B3 B3 B3 B3
N1 C2 C2 C2 C2
G1 G1 G1 G1
F2 F2 F2 F2 C-4-4vc
H4 H4 H4 H4
F3 F3 F3 F3
K3 K3 K3 K3
N1 N1 N1 N1
VC-4-4vc
Termination:
4 x 261 bytes
VC-4-4vc is reconstructed using the
(different) pointer values for alignment
ATM Cell
Page 59
SDH and SONET are International
Standards
ATM: 149.760 kbit/s
STM-N AU-4 VC-4
AUG C-4 E4: 139.264 kbit/s
STS-3C STS-3C
STS-3N
SPE
x3
x1 TU-3 VC-3 ATM: 48,384
TUG-3
x3 kbit/s
x1 x7
STM-0 AU-3 VC-3 DS3: 44.736 kbit/s
STS-1 C-3
STS-1 STS-1 SPE E3 : 34.368 kbit/s
x7
TUG-2 x1 TU-2 VC-2
VT C-2 DS2: 6.312 kbit/s
group VT-6 VT-SPE
Pointer processing
TU-12 VC-12
Multiplexing x3
VT-2 VT-SPE
C-12 E1: 2.048 kbit/s
x4
Aligning
TU-11 VC-11
Mapping C-11 DS1: 1.544 kbit/s
VT-1.5 VT-SPE
Page 60
SDH Network Elements
Page 61
SDH Network Elements
Terminal Multiplexer
SDH Repeater
Applications:
STM-n STM-n
Line Signal Regeneration
in Point-to-Point and Ring
Networks
Page 62
Add Drop Multiplexer
ADM
WEST EAST
STM-1/4 STM-1/4
......
Page 63
Synchronous Cross Connect
2.4 Gbit/s 2.4 Gbit/s
16x SDH 16x
622 Mbit/s Multiplexer 622 Mbit/s
4x
4x
155 Mbit/s
155 Mbit/s 155 Mbit/s
155
VC4
34 Mbit/s 34 Mbit/s
34 2 VC12 2
2 VC12 2 34
140 2 VC12 2
140 Mbit/s 2 VC12 2 140
140 Mbit/s
140 VC 4 VC4
140 Mbit/s VC4 140 140 Mbit/s
VC 3
34
VC 12 VC3
34 (45)Mbit/s VC3 34 (45)Mbit/s
VC12
VC11
2 (1.5)Mbit/s 2 2 (1.5)Mbit/s
VC12
Page 64
Synchronous Line Equipment
4
16 x 140 Mbit/s 4
Optical STM-16
or 4
Transmit
16 x STM-1 4 Sync Unit
MUX
Page 65
Hybrid Networks Connect Old and
New Technologies
140Mbit/s
STM-1
2Mbit/s TM
ADM
STM-1, STM-4
2Mbit/s
DXC
LAN
Page 66
SDH
STM-4 Network Topology
Trunk
Network L 2 Trunk Network
L1
STM-16
STM-1
Trunk Network
Exchange 1
L2
T M-
S
Local Network
Local
Exchange
FlexMux
Subscriber Mux
Access 64/2M
Page 67
Synchronization
Architecture in SDH
Page 68
Synchronization Network
SSU SSU
Synchronization Supply Unit
Page 69
Synchronization reference model
Limits:
Page 70
Synchronization of
SDH Network Elements
Internal 2 Mbit/s
155 Mbit/s Oscillator
Data Signal Data Signal
± 4.6 ppm
Osc.
Synchronous
SDH Signal
2 048 kHz
Central Clock
Page 71
Hold-over mode
100000
10000
1000
100
10
0.01 1 100 10000
Page 72
Hold-over measured values (TIE)
Page 73
Which Recommendations define
Synchronization Networks
Page 74
Monitoring, Maintenance
and Control Functions
in SDH
Page 75
Phys./Reg.
EVENTS SDH EVENTS SONET
LOS Loss Of Signal LOS Loss Of Signal
VT Path (VP)
TU-LOM Loss Of Multiframe LOM Loss Of Multiframe
BIP-2/B3 LO Path BIP Errors UNEQ-V VP Unequipped
LP-RDI LO Path Remote Defect Ind. RDI-V VP Remote Defect Ind.
LP-REI LO Path Remote Error Ind. REI-V VP Remote Error Ind.
LP-RFI LO Path Remote Failure Ind. RFI-V VP Remote Failure Ind.
PDI-V VP Payload Defect Ind.
LP-TIM LO Path Trace Ident. Mismatch TIM-V VP Trace Ident. Mismatch
LP-PLM LO Path Payload Label Mism. PLM-V VP Payload Label Mism.
Page 76
Frame Areas Covered by Parity
Bytes
Parity bytes providing a means to supervise the transmission
quality of a life STM-N signal !
B1:
RSOH - Supervision of the
whole STM-1 frame
Payload - Covers the regenerator
MSOH sections of a trans-
mission system
B2:
RSOH - Covers the multiplex
AU-PTR sections (from network
Payload node to network node)
MSOH
B3:
RSOH
- Covers the transmission
Payload paths from beginning to
Payload
the end (tributary to
MSOH tributary)
Page 77
Parity Supervison Procedure
Transmit Side
BIP-8 B1
Receive Side
recalculation at Rx side
Comparison
with the Tx side BIP-8 B1
value
Page 78
How to Built a Parity Byte ?
• Bit interleaved data field structure of the area covered
801 1 1 0 1 0 1 0 1 1 0 1 1 0 1 0 0 1 1 1 0 0 1 0 1
1 0 0 1 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 1 0 0 0
Page 79
SDH Maintenance Interactions
Regenerator Multiplex Higher Order Lower Order
Section Section Path Path
"1"
LOS/LOF AIS
(J0) RS-TIM
BIP Err.
(B1)
MS-AIS "1"
(K2) AIS
MS-BIP Err.
(B2)
(M1) MS-REI
MS-RDI
(K2)
AU-AIS "1"
AU-LOP
HP-UNEQ "1"
(C2) AIS
(J1) HP-TIM
HP-BIP Err.
(B3)
HP-REI
(G1)
HP-RDI
(G1)
TU-AIS "1"
TU-LOP
LOM
(H4)
(C2) HP-PLM
LP-UNEQ "1"
(V5) AIS
LP-TIM
(J2)
LP-BIP Err.
(V5)
(V5) LP-REI
(V5) LP-RDI
"1"
(V5) LP-PLM
AIS
Page 80
Maintenance Signal Definitions (1)
Page 81
Maintenance Signal Definitions (2)
TU-AIS All "1" in the entire TU incl. TU pointer
TU-LOP 8 to 10 NDF enable or 8 to 10 invalid pointers
LP-UNEQ VC-3: C2 = all "0" for >=frames;
VC-12: V5 (bits 5,6,7) = 000 for >=5 frames
LP-TIM VC-3: J1 mismatch; VC-12: J2 mismatch
LP-SLM VC-3: C2 mismatch; VC-12: V5 (bits 5,6,7) mismatch
BIP-2 Err Mismatch of the recovered and computed BIP-2 (V5)
LP-RDI V5 (bit 8) = 1, if TU-2 path AIS or signal failure received
LP-REI V5 (bit 3) = 1, if >=1 errors were detected by BIP-2
LP-RFI V5 (bit 4) = 1, if a failure is declared
Abbreviations:
Page 82
Perfomance Parameter
ITU-T G.821
ES Errored Second Second with > 1 bit error
SES Severely Errored Second Second with BER > 1 x 10E-3
ITU-T G.826
ES Errored Second Second with> 1errored block
SES Severely Errored Second Second with > 30% errored blocks
or > 1 defect
BBE Background Block Error Errored block, not occuring as
part of SES
Page 83
New Parameter:
Severly Errored Period
1 2 3 4 5 6 7 8 9 1 2 1 2 3 4 5 6 7 8 9 10
Time
Error-free Second
Page 84
Jitter and Wander
Page 85
Jitter and Wander Definitions
Jittered Signal
Jitter
Page 86
Sources of Jitter and Wander
• Interference signals
• Pattern dependent jitter
• Phase noise
• Delay variation
• Stuffing and wait time jitter
• Mapping jitter
• Pointer jitter
Page 87
Jitter and Wander Measurement Method
Clock
Input
Jitter
Signal Pattern HP LP and
Input
N f Wander
Clock 1 V Result
Evaluation
10 Hz
Frequency / Hz
Jitter Time
Amplitude
(PP)
Measurement Period
Page 90
Jitter and Wander Measurements
Page 91
WANDER Definitions
Page 92
TIE and MTIE Definitions
Wander / UI
e nting
s t
pre Offse
TIE min
Time
Observation Period
Start End
Page 93
Results (MTIE) compared to
Standards
Page 94
Network resilience
Page 95
Linear Protection (G.783)
W
1 + 1 Protection scheme
P
W
P 1 : 1 Protection scheme
W
W 1 : N Protection scheme
Page 96
Linear Protection (G.783)
W
1 + 1 Protection scheme
P
W
P 1 : 1 Protection scheme
W
W 1 : N Protection scheme
Page 97
Unidirectional and Bidirectional Rings
Traffic A B ADM Traffic A B
ADM
A B -> A A
Traffic B A
ADM B ADM ADM B ADM
Page 98
Unidirectional Path-Switched Ring
Unidirectional
normal traffic from Node A D
Fiber 1
W W
P P
Unidirectional
Fiber 1 NODE A NODE B
NODE F NODE C
NODE E NODE D
P P
W W
P P
Unidirectional
Fiber 1 NODE A NODE B
NODE F NODE C
NODE E NODE D
P P
W W
P
Unidirectional
P
Fiber 1 NODE A NODE B
NODE F NODE C
NODE E NODE D
P P
W W
Unidirectional
P P
Fiber 1 NODE A NODE B
NODE F NODE C
NODE E NODE D
P P
W W
Fiber 2 P P
NODE A NODE B
NODE F NODE C
NODE E NODE D
P P
W W
Working Line Protection Line MSPR .... Multiplex Section Protection Ring
2-Fiber MSPR protection Switching for
Working and Protection Failure
Fiber 1
W W
Fiber 2 P P
NODE A NODE B
NODE F NODE C
NODE E NODE D
P P
W W
Working Line Protection Line MSPR .... Multiplex Section Protection Ring
4-Fiber MSPR Normal traffic flow
from Node A D
W W
P P
NODE A NODE B
NODE F NODE C
NODE E NODE D
P P
W W
Working Line Protection Line MSPR .... Multiplex Section Protection Ring
4-Fiber MSPR protection Switching for
working fiber break Node A D
W W
P P
NODE A NODE B
NODE F NODE C
NODE E NODE D
P P
W W
Working Line Protection Line MSPR .... Multiplex Section Protection Ring
4-Fiber MSPR protection Switching for
working and protection Fiber Failure
W W
P P
NODE A NODE B
NODE F NODE C
NODE E NODE D
P P
W W
Working Line Protection Line MSPR .... Multiplex Section Protection Ring
TMN in SDH networks
Page 108
Network Management
Administrative functions:
Page 109
TMN Overlay
Q Central Q
OS
Q
Q
Local OS
Q
Q ECC
CC CC
Q ECC
ADM
ADM
ADM
ADM
Page 110
Telecommunication Management
Network (TMN) Overlay
Management of:
Performance
Central X Central X Faults
OS OS Configuration
Q3
Accounting
NE
Manager Q3
Security
NE Local
Manager OS
STM-N
Q3
Q3
QECC QECC
ADM DXC STM-N STM-N DXC
ADM
ADM
Page 111
TMN Reference Configuration
Operating
System
OS F
Workstation
Q3
Network
Element
Network MD: Conversion between different interfaces
NE Element (Information Conversion Function ICF:
NE manufacturer-specific information model ->
operator specific information model)
Page 112
SDH Benefits
Reduced equipment costs
multi vendor compatibility
TMN capabilities
Built-in DCN (data comm. network), DCC/ECC
Page 113
Synchronous Technology
pac ity STM-256
a
Future Trends in Lar ger C
PoS
Page 114
Let‘s summarize !
Page 115
Let‘s summarize !
Page 116
Let‘s summarize !
Page 117
Let‘s summarize !
Page 118
Page 120
Page 121