Vous êtes sur la page 1sur 21

DEPARTMENT OF TECHNICAL EDUCATION

ANDHRA PRADESH
Name : K Padmavathi
Designation : Lecturer
Branch : E.C.E
Institute : Government Polytechni for
Women, Kakinada

Year/Semester : III Semester


Subject : Digital Electronics
Subject Code : CM - 305
Topic : Logic Families
Duration : 50 Minutes
Sub Topic : Introduction, positive and

negative logic levels


Teaching Aids : Diagrams
CM305.21CM305.1
CM 305. 21 1
Objectives :

On completion of this period, you would be able


to
1. Know the introduction of logic families.

2. Positive and Negative logic levels

3. Logic family specifications

CM305.21CM305.1
CM 305. 21 2
LOGIC FAMILIES

• The logic gates are available in the form of

Integrated circuits

• Integrated circuits can accommodate various

number of logic gates and digital functions as

per the level of integration

CM305.21CM305.1
CM305. 21 3
• Many digital functions have been realized in a variety of

forms and each form is a “logic family”.

• A digital logic family is a group of compatible devices

with the same logic levels and supply voltages.

CM305.21CM305.1
CM305. 21 4
Digital logic families are classified into two types
based on fabrication techniques
1.Bipolar 2.Unipolar

• Bipolar families : The main elements are resistors,

diodes and transistors.

• Unipolar families: The main elements are “ FETs”.

CM305.21CM305.1
CM305. 21 5
Digital logic family

Bipolar logic family Unipolar logic


family
P Mos
Saturated Non- saturated
Resistor-transistor logic RTL Schottkey TTL N Mos

Direct couple transistor logic Emitter Coupled logic


DCTL C Mos
Integrated injection logic
Diode transistor logic DTL
High threshold transistor logic
HTL Table 2.1 Logic families classification
Transistor transistor logic TTL

Standard TTL
High power TTL
Low power TTL
Low power
schottkey CM305.21CM305.1
CM305. 21 6
Positive and Negative Logic levels
The digital signal has two discrete levels or
values: HIGH and LOW.

The two discrete levels high and low can also be


represented by the binary digits 1 and 0 respectively.

Logic level representation is of two types.

1. Positive Logic : higher voltage level is represented with logi

2. Negative logic: lower voltage level is represented with

logic. CM305.21CM305.1
CM305. 21 7
5V 5V
HIGH Low
3.5V 3.5V

1V 1V

LOW 0V 0V HIGH

Positive logic Negative logic


Fig 2.1 Logic levels

CM305.21CM305.1
CM305. 21 8
SPECIFICATIONS OF DIGITAL FAMILIES

• POWER DISSIPATION: The power dissipation of a


logic gate is equal to the dc supply voltage times the

average supply current. It is expressed in milli watts.


Low power dissipation is desirable.

• FAN-IN: The fan in of a logic circuit gives the


maximum number of inputs that can be connected

to the logic circuit without impairing other primary


parameters.

CM305.21CM305.1
CM305. 21 9
FAN-OUT: Fan –out of a logic circuit is the maximum

number of outputs that the circuit can reliably drive.

Higher Fan–out is desirable

PROPAGATION DELAY: The time it takes for the output of

a gate to change after the inputs have changed. It

characterizes the speed of a logic circuit. Expressed in

nano-seconds , low propagation delay is desirable

CM305.21CM305.1
CM 305. 21 10
NOISE IMMUNITY: The circuit’s ability to tolerate

noise signals is referred to as the noise immunity. A

quantitative measure of noise immunity is called noise

margin. High noise immunity is desirable.

SPEED- POWER PRODUCT: Product of propagation delay

time and the power dissipation at a specified frequency. Low

speed power product is desirable .

CM305.21CM305.1
CM 305. 21 11
Specifications of TTL

• Noise immunity : V in=0.5V

• Fan-in : 12 to 14

• Fan-out : > 10

• Propagation delay:15 ns

• Power Dissipation:0.1 mw

CM305.21CM305.1
CM 305. 21 12
Specifications of ECL

• Noise immunity : V in=0.16V

• Fan-in : >10

• Fan-out : >10

• Propagation delay: <3 ns

• Power Dissipation:175mw

CM305.21CM305.1
CM305. 21 13
Specifications of CMOS

• Noise immunity : V in=1.5V

• Fan-in : >10

• Fan-out : >10

• Propagation delay:15 ns

• Power Dissipation:0.001 mw

CM305.21CM305.1
CM 305. 21 14
Table 2.2 Comparison of TTL,CMOS and ECL Families:

Logi Noise Fan-in Fan-out Propagati Power


c immunity on delay dissipatio
famil V in (v) (ns) n(mw)
y
TTL 0.5 12 to 14 >10 15 0.1

ECL 0.16 >10 >10 <3 175

CM 1.5 >10 >10 15 0.001


OS

CM305.21CM305.1
CM 305. 21 15
Summary
• A digital logic family is a group of compatible

devices with the same logic levels and supply

voltages.
• Digital logic families are classified into two types

based on fabrication techniques

1.Bipolar 2.Unipolar

• Logic level representation is of two types.

1.Positive Logic 2.Negative Logic


CM305.21CM305.1
CM 305. 21 16
• The electrical characteristics of logic families are
fan-in, fan-out, power dissipation, propagation
delay time and noise margin.

• A standard TTL gate can sink 16mA and source


400microA.

• A standard TTL chip has a power dissipation of


about mW and a propagation delay time of 10nS.

CM305.21CM305.1
CM 305. 21 17
Quiz

1. Noise immunity is highest in the ------- logic family

(c) Cmos

(e) ECL

(g) T T L

(i) NONE

CM305. 21
CM305.21CM305.1 18
1. Power dissipation is lowest in -------- logical family

(c) CMS

(e) ECL

(g) T T L

(i) NONE

CM 305. 21
CM305.21CM305.1 19
3. Propagation delay time is lowest in ------- logical family.

(c) CMS

(e) ECL

(g) T T L

(i) NONE

CM 305. 21
CM305.21CM305.1 20
Frequently asked questions

1. Write the classification of logic families

3. Define power dissipation , propagation delay time, fan-


in, fan-out.

5. List the specification of T T L and ECL logical families

7. List the specification of C MOS logic families

9. Compare the performance of T T L C M O S , E C L


families
CM 305. 21
CM305.21CM305.1 21

Vous aimerez peut-être aussi