Vous êtes sur la page 1sur 18

DEPARTMENT OF TECHNICAL EDUCATION

ANDHRA PRADESH

Name : D.RAVI KUMAR


Designation : Lecturer in ECE

Branch : Electronics & Communication Engg.


Institute : Andhra polytechnic, Kakinada
Year/Semester : III Semester
Subject : Digital Electronics
Subject code : CM-305
Topic : Counters & Registers (3/20)
Sub Topic : Explanation of Mod-8 ripple counter
Duration : 50min.
Teaching aids : PPT & Animations
CM305.43 1
Objectives

On the completion of this period, you will be able


to know

• The working of modulo-8 ripple counter.

• Using positive edge triggered flip-flops.

• And using negative edge triggered flip-flops.

• the counting sequence of a counter from the timing


diagram.
CM305.43 2
Recap
• What is a positive edge triggered flip-flop?

• A flip-flop that changes its state at an instant when the clock


signal goes from low to high (0 to 1).

• What is a negative edge triggered flip-flop?

• A flip-flop that changes its state at an instant when the


clock signal goes from high to low (1 to 0).

• How many number of flip-flops are needed to design MOD-8


counter?
• Three.
CM305.43 3
+ve edge triggered Mod-8ripple counter

CM305.43 4
Working of MOD- 8 ripple counter

• Let us now discuss the working of MOD-8 ripple counter


using positive edge triggered flip-flops.

• As shown in the circuit diagram the clock input is given to


the LSB flip-flop only.

• The 2nd flip-flop is triggered by the inverted output of the 1st


flip-flop Q0

• The 3rd flip-flop is triggered by the inverted output of the 2nd


flip-flop Q1

CM305.43 5
Working of MOD- 8 ripple counter

• The output is taken from the direct outputs of the flip-


flops as Q2Q1Q0.

• The first flip-flop toggles at the positive going edge of


each clock pulse.

• But the 2nd and 3rd flip-flops toggle when the positive
going edges of Q0 and Q1 occur respectively.

CM305.43 6
Working of MOD- 8 ripple counter

• This means that the 2nd and 3rd flip-flops toggle at the
negative going edges of Q0 and Q1 respectively .

• As shown in the figure all the 3 flip-flops are connected


in toggle mode with J=K=1.

• Assume that initially all the flip-flops are reset i.e. the
initial state of the counter is Q2Q1Q0 =000.

CM305.43 7
Working of MOD- 8 ripple counter

At the leading edge of the 1st clock pulse Q0 goes high


and Q0 goes low.

• This has no effect on 2nd and 3rd flip-flop outputs because


a leading edge must occur to trigger these two flip-flops.

• Hence the output after the leading edge of the 1st clock
pulse is Q2Q1Q0 =001.

CM305.43 8
Working of MOD- 8 ripple counter

• The leading edge of the 2nd clock pulse causes the Q0 to


move from high to low , hence Q0 moves from low to high
and toggles the 2nd flip-flop.

• Hence Q 1becomes 1, this has no effect on 3rd flip-flop


because Q1 goes low and the output becomes
Q2Q1Q0 =010.

• The leading edge of the 3rd clock pulse changes Q0 to 1, this


makes Q0 low does not effects 2nd and 3rd flip-flops.

• Hence the output will be Q2Q1Q0 =011.


CM305.43 9
Working of MOD- 8 ripple counter

• In this way after each clock pulse the state of the counter
changes to its next binary value.

• After the 8th clock pulse the counter goes to its initial
state Q2Q1Q0=000 as shown in the timing diagram.

• This can be best understood by observing the timing


diagram of the positive edge triggered MOD-8 counter
given below.

CM305.43 10
Timing diagram of mod-8 ripple counter

CM305.43 11
Working of MOD- 8 ripple counter

• From the above timing diagrams it can be seen that after


the positive going edge of each clock pulse the state of the
counter changes.

• In a similar way we can explain the operation of MOD-8


ripple counter using negative edge triggered flip-flops with
the help of timing diagram.

• The block diagram and the timing diagram of counter with


negative edge triggered flip-flops is given below.

CM305.43 12
-ve edge triggered MOD-8 ripple counter

CM305.43 13
Timing diagram with -ve edge triggered flip-flops

CM305.43 14
Truth table of mod-8 counter

clock Present state Next state


Q2Q1Q0 Q2Q1Q0
1 000 001
2 001 010
3 010 011
4 011 100
5 100 101
6 101 110
7 110 111
8 111 000

CM305.43 15
Summary

• Modulo-8 counter needs 3flip-flops.

• A ripple counter is an asynchronous counter

• In a ripple counter the output of each flip- flop drives the


next flip-flop.

• Modulo-8 counter divides the input clock frequency by


eight.

CM305.43 16
Quiz

The number of flip-flops required to construct modulo-8


counter

(a). 2

(b). 3

(c). 4

(d). 8

CM305.43 17
Frequently asked questions

Draw the logic diagram of MOD-8 ripple counter using


positive edge triggered flip-flops.

Draw the logic diagram of MOD-8 ripple counter using


negative edge triggered flip-flops.

Explain the working of MOD-8 ripple counter with timing


diagram

CM305.43 18

Vous aimerez peut-être aussi