Computer Organization & Assembly Languages Assembler

Adapted from the slides prepared by Beck for the book, System Software: An Intro. to Systems Programming , 3rd Ed.

Overview
  

SIC Machine Architecture SIC/XE Machine Architecture Design and Implementation of Assembler
Source Program Object Assembler Code Linker

SIC, SIC/XE Program

Executable Code

Loader

Overview
  

SIC Machine Architecture SIC/XE Machine Architecture Design and Implementation of Assembler
Source Program Object Assembler Code Linker

SIC, SIC/XE Program

Executable Code

Loader

SIC Machine Architecture

 

The Simplified Instructional Computer (SIC) Memory

  

Memory consists of 8-bit bytes Any 3 consecutive bytes form a word (24 bits) Total of 32768 (215) bytes in the computer memory Five 24-bits registers

Registers


SIC Machine Architecture



Data Formats
   

Integers are stored as 24-bit binary number 2s complement representation for negative values Characters are stored using 8-bit ASCII codes No floating-point hardware on the standard version of SIC Standard version of SIC Mode Direct Indexed Indication x=0 x=1

Instruction Formats


8 opcode

1 x

15 address

Target address calculation TA=address TA=address+(X) (X): the contents of register X

SIC Machine Architecture



Instruction Set
 

 

Load and store registers  LDA, LDX, STA, STX, etc. Integer arithmetic operations  ADD, SUB, MUL, DIV  All arithmetic operations involve register A and a word in memory, with the result being left in A COMP Conditional jump instructions  JLT, JEQ, JGT Subroutine linkage  JSUB, RSUB I/O (transferring 1 byte at a time to/from the rightmost 8 bits of register A)  Test Device instruction (TD)  Read Data (RD)  Write Data (WD)

SIC Programming Example

LDA STA LDCH STCH . . . RESW WORD BYTE RESB FIVE ALPHA CHARZ C1

ALPHA FIVE CHARZ C1

1 5 CZ 1

one-word one-word one-byte one-byte

variable constant constant variable

SIC Programming Example

LDX MOVECH LDCH STCH TIX JLT . . . STR1 BYTE STR2 RESB ZERO WORD ELEVEN WORD ZERO STR1,X STR2,X ELEVEN MOVECH initialize index register to 0 load char from STR1 to reg A add 1 to index, compare to 11 loop if less than

CTEST STRING 11 0 11

SIC Programming Example

ADDLP LDA STA LDX LDA ADD STA LDA ADD STA COMP JLT ... ... RESW RESW RESW RESW WORD WORD WORD ZERO INDEX INDEX ALPHA,X BETA,X GAMMA,X INDEX THREE INDEX K300 ADDLP 1 100 100 100 0 3 300 initialize index value to 0 load index value to reg X load word from ALPHA into reg A store the result in a word in GAMMA add 3 to index value compare new index value to 300 loop if less than 300

INDEX ALPHA BETA GAMMA ZERO THREE K300

array variables100 words each one-word constants

SIC Programming Example

INLOOP TD JEQ RD STCH . . OUTLP TD JEQ LDCH WD . . INDEV BYTE OUTDEV BYTE DATA RESB INDEV INLOOP INDEV DATA OUTDEV OUTLP DATA OUTDEV XF1 X05 1 test input device loop until device is ready read one byte into register A

test output device loop until device is ready write one byte to output device input device number output device number

Overview
  

SIC Machine Architecture SIC/XE Machine Architecture Design and Implementation of Assembler
Source Program Object Assembler Code Linker

SIC, SIC/XE Program

Executable Code

Loader

SIC/XE Machine Architecture

 

An XE version (upward compatible) Memory



Maximum 1 megabyte (220 bytes) Additional registers are provided by SIC/XE

Registers


Support 48-bit floating-point data type

SIC/XE Machine Architecture



Instruction Formats

8 op 8 4 r1 1 1 1 1 1 1 n i x b p e 1 1 1 1 1 1 n i x b p e 4 r2 12 disp 20 address

Format 1 (1 byte)

Format 2 (2 bytes) 6 Format 3 (3 bytes) op 6 Format 4 (4 bytes) op

op

Formats 1 and 2 are instructions that do not reference memory at all

SIC/XE Machine Architecture



Addressing modes
      

Base relative (n=1, i=1, b=1, p=0) Program-counter relative (n=1, i=1, b=0, p=1) Direct (n=1, i=1, b=0, p=0) Immediate (n=0, i=1, x=0) Indirect (n=1, i=0, x=0) Indexing (both n & i = 0 or 1, x=1) Extended (e=1 for format 4, e=0 for format 3)

SIC/XE Machine Architecture



Base Relative Addressing Mode

n opcode i x b p e 1 0 disp 1 1

n=1, i=1, b=1, p=0, TA=(B)+disp



(0edisp e4095)

Program-Counter Relative Addressing Mode

n i x b p e opcode 1 1 0 1 disp

n=1, i=1, b=0, p=1, TA=(PC)+disp (-2048edisp e2047)

SIC/XE Machine Architecture



Direct Addressing Mode

n opcode i x b p e 0 0 disp 1 1

n=1, i=1, b=0, p=0, TA=disp

(0edisp e4095)

n i x b p e opcode 1 1 1 0 0 disp

n=1, i=1, b=0, p=0, TA=(X)+disp (with index addressing mode)

SIC/XE Machine Architecture



Immediate Addressing Mode

n opcode i x b p e disp 0 1 0

n=0, i=1, x=0, operand=disp



Indirect Addressing Mode

n i x b p e opcode 1 0 0 disp

n=1, i=0, x=0, TA=(disp)

SIC/XE Machine Architecture



Simple Addressing Mode

n opcode i x b p e disp 0 0

i=0, n=0, TA=bpe+disp (SIC standard)

n i x b p e opcode 1 1 disp

i=1, n=1, TA=disp (SIC/XE standard)

SIC/XE Machine Architecture



Addressing Modes Summary

SIC/XE Machine Architecture



Instruction Format

SIC/XE Machine Architecture



Instruction Set


Instructions to load and store the new registers  LDB, STB, etc. Floating-point arithmetic operations  ADDF, SUBF, MULF, DIVF Register move instruction  RMO Register-to-register arithmetic operations  ADDR, SUBR, MULR, DIVR Supervisor call instruction  SVC Input and Output  There are I/O channels that can be used to perform input and output while the CPU is executing other instructions

SIC/XE Programming Example

SIC version LDA STA LDCH STCH . . . RESW WORD BYTE RESB FIVE ALPHA CHARZ C1 SIC/XE version LDA #5 STA ALPHA LDCH #90 STCH C1 . . . ALPHA RESW 1 C1 RESB 1

ALPHA FIVE CHARZ C1

1 5 CZ 1

SIC/XE Programming Example

LDS LDA ADDR SUB STA LDA ADDR SUB STA ... ... RESW RESW RESW RESW RESW INCR ALPHA S,A #1 BETA GAMMA S,A #1 DELTA 1 1 1 1 1 one-word variables

ALPHA BETA GAMMA DELTA INCR

SIC/XE Programming Example

LDT LDX MOVECH LDCH STCH TIXR JLT . . . STR1 BYTE STR2 RESB #11 #0 STR1,X STR2,X T MOVECH initialize register T to 11 initialize index register to 0 load char from STR1 to reg A store char into STR2 add 1 to index, compare to 11 loop if less than 11

CTEST STRING 11

SIC/XE Programming Example

LDS LDT LDX LDA ADD STA ADDR COMPR JLT ... ... RESW RESW RESW #3 #300 #0 ALPHA,X BETA,X GAMMA,X S,X X,T ADDLP 100 100 100

ADDLP

load from ALPHA to reg A store in a word in GAMMA add 3 to index value compare to 300 loop if less than 300 array variables100 words each

ALPHA BETA GAMMA

SIC/XE Programming Example

Overview
  

SIC Machine Architecture SIC/XE Machine Architecture Design and Implementation of Assembler
Source Program Object Assembler Code Linker

SIC, SIC/XE Program

Executable Code

Loader

Design & Implementation of Assembler

      

Functions of a Basic Assembler Object File Address Translation Program Relocation Program Block Control Section & Program Linking Other Issues
 

One-pass Assembler Multi-pass Assembler

Design & Implementation of Assembler

      

Functions of a Basic Assembler Object File Address Translation Program Relocation Program Block Control Section & Program Linking Other Issues
 

One-pass Assembler Multi-pass Assembler

Functions of a Basic Assembler

    

Mnemonic code (or instruction name) opcode. Symbolic operands (e.g., variable names) addresses. Choose the proper instruction format & addressing mode. Constants Numbers. Output to object files and listing files.

Assembler Directives


Pseudo-Instructions
 

Not translated into machine instructions Providing information to the assembler

Basic assembler directives

     

START END BYTE WORD RESB RESW

Example Program with Object Code

Line Loc
5 10 15 20 25 30 35 40 45 50 55 60 65 70 75 80 85 90 95 100 105 1000 1000 1003 1006 1009 100C 100F 1012 1015 1018 101B 101E 1021 1024 1027 102A 102D 1030 1033 1036 1039

Source statement
COPY FIRST CLOOP START STL JSUB LDA COMP JEQ JSUB J LDA STA LDA STA JSUB LDL RSUB BYTE WORD WORD RESW RESW RESB 1000 RETADR RDREC LENGTH ZERO ENDFIL WRREC CLOOP EOF BUFFER THREE LENGTH WRREC RETADR CEOF 3 0 1 1 4096

Object code
141033 482039 001036 281030 301015 482061 3C1003 00102A 0C1039 00102D 0C1036 482061 081033 4C0000 454F46 000003 000000

ENDFIL

EOF THREE ZERO RETADR LENGTH BUFFER

110 115 120 125 130 135 140 145 150 155 160 165 170 175 180 185 190 195 200 205 210 215 220 225 230 235 240 245 250 255

2039 203C 203F 2042 2045 2048 204B 204E 2051 2054 2057 205A 205D 205E

. . . RDREC RLOOP

SUBROUTINE TO READ RECORD INTO BUFFER LDX LDA TD JEQ RD COMP JEQ STCH TIX JLT STX RSUB BYTE WORD ZERO ZERO INPUT RLOOP INPUT ZERO EXIT BUFFER,X MAXLEN RLOOP LENGTH XF1 4096 041030 001030 E0205D 30203D D8205D 281030 302057 549039 2C205E 38203F 101036 4C0000 F1 001000

EXIT INPUT MAXLEN . . . WRREC WLOOP

SUBROUTINE TO WRITE RECORD FROM BUFFER LDX TD JEQ LDCH WD TIX JLT RSUB BYTE END ZERO OUTPUT WLOOP BUFFER,X OUTPUT LENGTH WLOOP X05 FIRST 041030 E02079 302064 509039 DC2079 2C1036 382064 4C0000 05

2061 2064 2067 206A 206D 2070 2073 2076 2079

OUTPUT

Symbolic Operands


Mnemonic code (or instruction name) opcode.

STL 1033 opcode 14 10 33 0001 0100 0 001 0000 0011 0011

Use variable names instead of memory addresses

  

Labels (for jump instructions) Subroutines COPY START 1000 Constants LDA LEN forward references LEN RESW 1

Two Pass Assembler



Pass 1
  

Assign addresses to all statements in the program Save the values assigned to all labels for use in Pass 2 Perform some processing of assembler directives Assemble instructions Generate data values defined by BYTE, WORD Perform processing of assembler directives not done in Pass 1 Write the object program and the assembly listing

Pass 2
   

Two Pass Assembler

Source program

Pass 1
OPTAB SYMTAB

Intermediate file

Pass 2
SYMTAB

Object codes

Data Structures: Operation Code Table (OPTAB) Symbol Table (SYMTAB) Location Counter(LOCCTR)

Two Pass Assembler Pass 1

Two Pass Assembler Pass 2

OPTAB (operation code table)



Content


Mnemonic, machine code (instruction format, length) etc. Static table Array or hash table, easy for search

Characteristic


Implementation


SYMTAB (symbol table)

COPY FIRST  Label name, value, flag, (type, length) etc. CLOOP ENDFIL  Characteristic EOF  Dynamic table (insert, delete, search) THREE ZERO  Implementation RETADR  Hash table, non-random keys, hashing LENGTH function BUFFER RDREC


Content

1000 1000 1003 1015 1024 102D 1030 1033 1036 1039 2039

Design & Implementation of Assembler

      

Functions of a Basic Assembler Object File Address Translation Program Relocation Program Block Control Section & Program Linking Other Issues
 

One-pass Assembler Multi-pass Assembler

Object Program


Header
Col. 1 Col. 2~7 Col. 8~13 Col. 14-19 H Program name Starting address (hex) Length of object program in bytes (hex) T Starting address in this record (hex) Length of object code in this record in bytes (hex) Object code (69-10+1)/6=10 instructions E Address of first executable instruction (hex) (END program_name)

Text
Col.1 Col.2~7 Col. 8~9 Col. 10~69

End
Col.1 Col.2~7

Line Loc
5 10 15 20 25 30 35 40 45 50 55 60 65 70 75 80 85 90 95 100 105 1000 1000 1003 1006 1009 100C 100F 1012 1015 1018 101B 101E 1021 1024 1027 102A 102D 1030 1033 1036 1039

Source statement
COPY FIRST CLOOP START STL JSUB LDA COMP JEQ JSUB J LDA STA LDA STA JSUB LDL RSUB BYTE WORD WORD RESW RESW RESB 1000 RETADR RDREC LENGTH ZERO ENDFIL WRREC CLOOP EOF BUFFER THREE LENGTH WRREC RETADR CEOF 3 0 1 1 4096

Object code
141033 482039 001036 281030 301015 482061 3C1003 00102A 0C1039 00102D 0C1036 482061 081033 4C0000 454F46 000003 000000

ENDFIL

EOF THREE ZERO RETADR LENGTH BUFFER

Object Program Example

H COPY 001000 00107A T 001000 1E 141033 482039 001036 281030 301015 482061 ... T 00101E 15 0C1036 482061 081044 4C0000 454F46 000003 000000 T 002039 1E 041030 001030 E0205D 30203F D8205D 281030 T 002057 1C 101036 4C0000 F1 001000 041030 E02079 302064 T 002073 07 382064 4C0000 05 E 001000 starting address

Design & Implementation of Assembler

      

Functions of a Basic Assembler Object File Address Translation Program Relocation Program Block Control Section & Program Linking Other Issues
 

One-pass Assembler Multi-pass Assembler

An SIC/XE Example
Line Loc
5 10 12 13 15 20 25 30 35 40 45 50 55 60 65 70 80 95 100 105 0000 0000 0003 0006 000A 000D 0010 0013 0017 001A 001D 0020 0023 0026 002A 002D 0030 0033 0036

Source statement
COPY FIRST CLOOP START STL LDB BASE +JSUB LDA COMP JEQ +JSUB J LDA STA LDA STA +JSUB J BYTE RESW RESW RESB 0 RETADR #LENGTH LENGTH RDREC LENGTH #0 ENDFIL WRREC CLOOP EOF BUFFER #3 LENGTH WRREC @RETADR CEOF 1 1 4096

Object code
17202D 69202D 4B101036 032026 290000 332007 4B10105D 3F2FEC 032010 0F2016 010003 0F200D 4B10105D 3E2003 454F46

ENDFIL

EOF RETADR LENGTH BUFFER

115 120 125 130 132 133 135 140 145 150 155 160 165 170 175 180 185 195 200 205 210 212 215 220 225 230 235

1036 1038 103A 103C 1040 1043 1046 1049 104B 104E 1051 1053 1056 1059 105C

. . RDREC

READ RECORD INTO BUFFER CLEAR X CLEAR A CLEAR S +LDT #4096 TD INPUT JEQ RLOOP RD INPUT COMPR A,S JEQ EXIT STCH BUFFER,X TIXR T JLT RLOOP STX LENGTH RSUB BYTE XF1 B410 B400 B440 75101000 E32019 332FFA DB2013 A004 332008 57C003 B850 3B2FEA 134000 4F0000 F1

RLOOP

EXIT INPUT . . . WRREC

WRITE RECORD FROM BUFFER X LENGTH OUTPUT WLOOP BUFFER,X OUTPUT T B410 774000 E32011 332FFA 53C003 DF2008 B850

105D 105F 1062 1065 1068 106B 106E

CLEAR LDT WLOOP TD JEQ LDCH WD TIXR ...(omitted)

A Case of Object Code Generation



Line 10

STL RETADR


17 20 2D

The mode bit p=1, meaning PC relative addressing mode.

6 bits OPCODE n i x b p e 0001 01 17 1 1 0 0 1 0 20 12 bits Address 0000 0010 1101 2D

Instruction Format and Addressing Mode



SIC/XE
      

PC-relative or Base-relative addressing: op m Indirect addressing: op @m Immediate addressing: op #c Extended format: +op m Index addressing: op m,x register-to-register instructions larger memory -> multi-programming (program allocation)

Translation


Register translation


Register name (A, X, L, B, S, T, F, PC, SW) and their values (0,1, 2, 3, 4, 5, 6, 8, 9) Preloaded in SYMTAB Most register-memory instructions use program counter relative or base relative addressing Format 3: 12-bit address field  Base-relative: 0~4095  PC-relative: -2048~2047 Format 4: 20-bit address field

Address translation


PC-Relative Addressing Mode



PC-relative


10

0000

FIRST STL

RETADR

17202D

OPCODE n i x b p e 0001 01



Address (02D)16

1 1 0 0 1 0

Displacement= RETADR - PC = 30-3 = 2D

0017 J CLOOP 3F2FEC

40

OPCODE n i x b p e 0011 11


Address (FEC)16

1 1 0 0 1 0

Displacement= CLOOP-PC= 6 - 1A= -14= FEC

Base-Relative Addressing Modes



Base-relative
   

Base register is under the control of the programmer 12 LDB #LENGTH 13 BASE LENGTH 160 104E STCH BUFFER, X

57C003

OPCODE n i x b p e 0101 01



Address (003)16

1 1 1 1 0 0

Displacement= BUFFER - B = 0036 - 0033 = 3

NOBASE is used to inform the assembler that the contents of the base register no longer be relied upon for addressing

Immediate Address Translation



Immediate addressing


55

0020

LDA

#3

010003

OPCODE n i x b p e 0000 00


Address (003)16
#4096 75101000

0 1 0 0 0 0
103C +LDT

133

OPCODE n i x b p e 0111 01 0 1 0 0 0 1

Address (01000)16

Immediate Address Translation



Immediate addressing


12

0003

LDB

#LENGTH

69202D

OPCODE n i x b p e 0110 10


Address (02D)16
#LENGTH 690033

0 1 0 0 1 0
LDB

12

0003

OPCODE n i x b p e 0110 10
   

Address (033)16

0 1 0 0 0 0

The immediate operand is the symbol LENGTH The address of this symbol LENGTH is loaded into register B LENGTH=0033=PC+displacement=0006+02D If immediate mode is specified, the target address becomes the operand

Indirect Address Translation



Indirect addressing


Target addressing is computed as usual (PC-relative or BASErelative)




Only the n bit is set to 1

70 002A J @RETADR 3E2003

OPCODE n i x b p e 0011 11
 

Address (003)16

1 0 0 0 1 0

TA=RETADR=0030 TA=(PC)+disp=002D+0003

Design & Implementation of Assembler

      

Functions of a Basic Assembler Object File Address Translation Program Relocation Program Block Control Section & Program Linking Other Issues
 

One-pass Assembler Multi-pass Assembler

Program Relocation

Examples of Program Relocation


5 10 15 20 25 30 35 40 45 50 55 60 65 70 75 80 85 90 95 100 105

Absolute program, starting address 1000

2000 2000 2003 2006 2009 200C 200F 2012 2015 2018 201B 201E 2021 2024 2027 202A 202D 2030 2033 2036 2039 1000 1000 1003 1006 1009 100C 100F 1012 1015 1018 101B 101E 1021 1024 1027 102A 102D 1030 1033 1036 1039 COPY FIRST CLOOP START STL JSUB LDA COMP JEQ JSUB J LDA STA LDA STA JSUB LDL RSUB BYTE WORD WORD RESW RESW RESB 1000 RETADR RDREC LENGTH ZERO ENDFIL WREC CLOOP EOF BUFFER THREE LENGTH WREC RETADR C'EOF' 3 0 1 1 4096 141033 482039 001036 281030 301015 482061 3C1003 00102A 0C1039 00102D 0C1036 482061 081033 4C0000 454E46 000003 000000 142033 483039 002036 282030 302015 483061 3C2003 00202A 0C2039 00202D 0C2036 483061 082033 4C0000 454E46 000003 000000

ENDFIL

EOF THREE ZERO RETADR LENGTH BUFFER

Problems of Program Relocation



Except for absolute address, the rest of the instructions need not be modified
 

not a memory address (immediate addressing) PC-relative, Base-relative

The only parts of the program that require modification at load time are those that specify direct addresses

How to Make Program Relocation Easier



Use program-counter (PC) relative addresses



Did you notice that we didnt modify the addresses for JEQ, JLT and J instructions? We didnt modify the addresses for RETADR, LENGTH, and BUFFER in Figure 2.6 either.

Virtual memory! (Not covered in this course)

Examples of Program Relocation

5 10 12 13 15 20 25 30 35 40 45 50 55 60 65 70 80 95 100 1000 1000 1003 1006 100A 100D 1010 1013 1017 101A 101D 1020 1023 1026 102A 102D 1030 1036 0000 0000 0003 0006 000A 000D 0010 0013 0017 001A 001D 0020 0023 0026 002A 002D 0030 0036 COPY FIRST START STL LDB BASE +JSUB LDA COMP JEQ +JSUB J LDA STA LDA STA +JSUB J BYTE RESW RESB 0 ==

1000
17202D 69202D 4B101036 032026 290000 332007 4B10105D 3F2FEC 032010 0F2016 010003 0F200D 4B10105D 3E2003 454F46 17202D 69202D 4B102036 032026 290000 332007 4B10205D 3F2FEC 032010 0F2016 010003 0F200D 4B10205D 3E2003 454F46

CLOOP

ENDFIL

EOF RETADR BUFFER

RETADR #LENGTH LENGTH RDREC LENGTH #0 ENDFIL WRREC CLOOP EOF BUFFER #3 LENGTH WRREC @RETADR C'EOF' 1 4096

Relocatable Program


Modification record
 

Col 1 M Col 2-7 Starting location of the address field to be

modified, relative to the beginning of the program

Col 8-9 length of the address field to be modified, in halfbytes

Object Code with Modification Record

Design & Implementation of Assembler

      

Functions of a Basic Assembler Object File Address Translation Program Relocation Program Block Control Section & Program Linking Other Issues
 

One-pass Assembler Multi-pass Assembler

Program Blocks


 

Refer to segments of code that are rearranged within a single object program unit USE [blockname] At the beginning, statements are assumed to be part of the unnamed (default) block If no USE statements are included, the entire program belongs to this single block Each program block may actually contain several separate segments of the source program

Program Blocks - Implementation



Pass 1
 

Each program block has a separate location counter Each label is assigned an address that is relative to the start of the block that contains it At the end of Pass 1, the latest value of the location counter for each block indicates the length of that block The assembler can then assign to each block a starting address in the object program The address of each symbol can be computed by adding the assigned block starting address and the relative address of the symbol to that block

Pass 2


Program Blocks - Implementation



Each source line is given a relative address assigned and a block number

For absolute symbol, there is no block number

line 107 Example

  

20 0006 0 LDA LENGTH LENGTH = (Block 1) + 0003 = 0066 + 0003 = 0069 LOCCTR = (Block 0) + 0009 = 0009

032060

Object Code

Loading Program Blocks

Design & Implementation of Assembler

      

Functions of a Basic Assembler Object File Address Translation Program Relocation Program Block Control Section & Program Linking Other Issues
 

One-pass Assembler Multi-pass Assembler

Control Section


Are most often used for subroutines or other logical subdivisions of a program The programmer can assemble, load, and manipulate each of these control sections separately Instruction in one control section may need to refer to instructions or data located in another section Because of this, there should be some means for linking control sections together

External Definition and References



External definition
 

EXTDEF name [, name] EXTDEF names symbols that are defined in this control section and may be used by other sections EXTREF name [,name] EXTREF names symbols that are used in this control section and are defined elsewhere
15 0003 CLOOP +JSUB 160 0017 +STCH 190 0028 MAXLEN WORD RDREC BUFFER,X BUFEND-BUFFER 4B100000 57900000 000000

External reference
 

Example


Implementation


The assembler must include information in the object program that will cause the loader to insert proper values where they are required Define record
   

Col. 1 D Col. 2-7 Name of external symbol defined in this control section Col. 8-13 Relative address within this control section (hexadeccimal) Col.14-73 Repeat information in Col. 2-13 for other external symbols Col. 1 D Col. 2-7 Name of external symbol referred to in this control section Col. 8-73 Name of other external reference symbols

Refer record
  

Modification Record


Modification record
   

Col. 1 M Col. 2-7 Starting address of the field to be modified (hexiadecimal) Col. 8-9 Length of the field to be modified, in half-bytes (hexadeccimal) Col.11-16 External symbol whose value is to be added to or subtracted from the indicated field Note: control section name is automatically an external symbol, i.e. it is available for use in Modification records.

Object Code

Design & Implementation of Assembler

      

Functions of a Basic Assembler Object File Address Translation Program Relocation Program Block Control Section & Program Linking Other Issues
 

One-pass Assembler Multi-pass Assembler

One-Pass Assemblers


Main problem


Forward references  Data items & labels on instructions Require all such areas be defined before they are referenced Labels on instructions: no good solution Load-and-go  Produces object code directly in memory for immediate execution The other  Produces usual kind of object code for later execution

Solution
 

Two types of one-pass assembler



Load-and-go Assembler


Characteristics
 

Useful for program development and testing Avoids the overhead of writing the object program out and reading it back Both one-pass and two-pass assemblers can be designed as load-and-go. However one-pass also avoids the over head of an additional pass over the source program For a load-and-go assembler, the actual address must be known at assembly time, we can use an absolute program

Load-and-go Assembler


For ward references handling

1. Omit the address translation 2. Insert the symbol into SYMTAB, and mark this symbol undefined 3. The address that refers to the undefined symbol is added to a list of forward references associated with the symbol table entry 4. When the definition for a symbol is encountered, the proper address for the symbol is then inserted into any instructions previous generated according to the forward reference list

Load-and-go Assembler


At the end of the program



Any SYMTAB entries that are still marked with * indicate undefined symbols Search SYMTAB for the symbol named in the END statement and jump to this location to begin execution

The actual starting address must be specified at assembly time

After Scanning Line 40

After Scanning Line 160

Object Code

Multi-Pass Assemblers


Restriction on EQU and ORG



No forward reference, since symbols value cant be defined during the first pass Use link list to keep track of whose value depend on an undefined symbol

Example


Example of Multi-pass Assembler

Example of Multi-pass Assembler

Example of Multi-pass Assembler

Example of Multi-pass Assembler

Example of Multi-pass Assembler